SIO1007 datasheet(101/108 Pages) MICROCHIP

101 / 108 page

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DS00002020A-page 101

SIO1007

21.3

Setup of XNOR Chain

Warning: Ensure power supply is off during setup.

Connect VSS pins to ground.

Connect VCC pins and VTR pin to VCC (3.3V).

Connect an oscilloscope, voltmeter, or other measurement device to the nIO_PME pin.

All other pins should be tied to ground.

21.4

Testing Procedure

Turn power on.

With LAD0 pin and nLFRAME pin, low, bring nPCI_RESET pin high. The chip is now in XNOR chain test mode.

At this point, all inputs to the first XNOR chain are low. The output, on nIO_PME (pin 17), should also be low.

Refer to INITIAL CONFIG on Table 21-1.

Bring pin 64 high. The output on the nIO_PME pin should go high. Refer to STEP ONE on Table 21-1.

In descending pin order, bring each input high. The output should switch states each time an input is toggled.

Continue until all inputs are high. The output on nIO_PME should now be low. Refer to END CONFIG on

Table 21-1.

The current state of the chip is now represented by INITIAL CONFIG in Table 21-2.

Each input should now be brought low, starting at pin one and continuing in ascending order. Continue until all

inputs are low. The nIO_PME output should now be low. Refer to Table 21-2.

To exit test mode, tie LAD0 (pin 20) OR nLFRAME (pin 24) high, and toggle nPCI_RESET from a low to a high

state.An odd number of inputs (all grounded) yield a logic high on the chain output pin. If all the inputs are held

high the value on the chain output should be low.

SIO1007 数据表(PDF) 101 Page - Microchip Technology