AD9142ABCPZRL datasheet(38/73 Pages) AD

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Data Sheet

AD9142A

TRANSMIT ENABLE FUNCTION

The transmit enable (TXEN) function provides the user with a

hardware switch of the DAC output. The function accepts a

CMOS signal via Pin 6 (TXEN). When this signal is detected

high, the transmit path is enabled and the DAC transmits the

data normally. When this signal is detected low, one of the three

actions related to the DAC output is triggered. This can be

configured in Register 0x43.

1. The DAC output is gradually attenuated from full scale gain

to 0. The attenuation step size is set in Register 0x42[5:0].

2. The DAC is put in sleep mode and the output current is

turned off. Other areas of the DAC are still running in this

mode.

3. The DAC is put in power-down mode. In this mode, not

only the DAC output current is turned off but the rest of

the DAC is powered down. This minimizes the power

consumption of the DAC when the data is not transmitting

but it takes a bit longer than the first two modes to start to

retransmit data due to the device power-up time.

The TXEN function also provides a gain ramp-up function that

lets the user turn on the DAC output gradually when the TXEN

signal switches from low to high. The ramp-up gain step can be

configured using Register 0x41[5:0].

DIGITAL FUNCTION CONFIGURATION

Each of the digital gain and phase adjust functions and the

inverse sinc filter can be enabled and adjusted independently.

The pipeline latencies these blocks add into the data path are

different between enabled and disabled. If fixed DAC pipeline

latency is desired during operation, leave these functions always

on or always off after initial configuration.

The digital dc adjust function is always on. The default value is

0; that is, there is no additional dc offset. The pipeline latency that

this block adds is a constant, no matter the value of the dc

offset.

There is also a latency difference between using and not using

the input signal power detection and protection function.

Therefore, to keep the overall latency fixed, leave this function

always on or always off after the initial configuration.

Rev. A | Page 37 of 72

AD9142ABCPZRL 数据表(PDF) 38 Page - Analog Devices

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