AD9142ABCPZRL datasheet(45/73 Pages) AD

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AD9142A

Data Sheet

Rev. A | Page 44 of 72

ANALOG OUTPUTS

TRANSMIT DAC OPERATION

Figure 56 shows a simplified block diagram of the transmit path

DACs. The DAC core consists of a current source array, a switch

core, digital control logic, and full-scale output current control.

The DAC full-scale output current (IOUTFS) is nominally 20 mA.

The output currents from the IOUT1P/IOUT2P and IOUT1N/

IOUT2N pins are complementary, meaning that the sum of the

two currents always equals the full-scale current of the DAC.

The digital input code to the DAC determines the effective

differential current delivered to the load.

Figure 56. Simplified Block Diagram of DAC Core

The DAC has a 1.2 V band gap reference with an output imped-

ance of 5 kΩ. The reference output voltage appears on the VREF

pin. When using the internal reference, decouple the VREF pin

to AVSS with a 0.1 μF capacitor. Use the internal reference only

for external circuits that draw dc currents of 2 μA or less. For

dynamic loads or static loads greater than 2 μA, buffer the VREF

pin. If desired, the internal reference can be overdriven by

applying an external reference (from 1.10 V to 1.30 V) to the

VREF pin.

A 10 kΩ external resistor, RSET, must be connected from the

FSADJ pin to AVSS. This resistor, together with the reference

control amplifier, sets up the correct internal bias currents for

the DAC. Because the full-scale current is inversely proportional to

this resistor, the tolerance of RSET is reflected in the full-scale

output amplitude.

The full-scale current equation, where the DAC gain is

individually set for the Q and I DACs in Register 0x40 and

































DAC gain

SET

REF

For nominal values of VREF (1.2 V), RSET (10 kΩ), and DAC gain

(512), the full-scale current of the DAC is typically 20 mA. The

DAC full-scale current can be adjusted from 8.64 mA to 31.68 mA

by setting the DAC gain parameter, as shown in Figure 57.

Figure 57. DAC Full-Scale Current vs. DAC Gain Code

Transmit DAC Transfer Function

The output currents from the IOUT1P/IOUT2P and IOUT1N/

IOUT2N pins are complementary, meaning that the sum of the

two currents always equals the full-scale current of the DAC. The

digital input code to the DAC determines the effective differen-

tial current delivered to the load. IOUT1P/IOUT2P provide

maximum output current when all bits are high. The output

currents vs. DACCODE for the DAC outputs is expressed as

OUTFS

OUTP

DACCODE













(1)

IOUTN = IOUTFS – IOUTP

(2)

where DACCODE = 0 to 2N − 1.

Transmit DAC Output Configurations

The optimum noise and distortion performance of the

AD9142A is realized when it is configured for differential

operation. The common-mode rejection of a transformer or

differential amplifier significantly reduces the common-mode error

sources of the DAC outputs. These common-mode error sources

include even-order distortion products and noise. The

enhancement in distortion performance becomes more significant

as the frequency content of the reconstructed waveform

increases and/or its amplitude increases. This is due to the first-

order cancellation of various dynamic common-mode

distortion mechanisms, digital feedthrough, and noise.

I DAC

IOUT1P

IOUT1N

Q DAC

IOUT2N

IOUT2P

CURRENT

SCALING

I DAC FS ADJUST

REG 0x18, REG 0x19

Q DAC FS ADJUST

REG 0x1A, REG 0x1B

0.1µF

10kΩ

RSET

FSADJ

VREF

5kΩ

1.2V

01000

DAC GAIN CODE

200

400

600

800

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