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AD9142ABCPZRL 数据表(PDF) 63 Page - Analog Devices

部件名 AD9142ABCPZRL
功能描述  Multiple chip synchronization
PDF  73 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9142ABCPZRL 数据表(HTML) 63 Page - Analog Devices

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AD9142A
Data Sheet
INTERPOLATION CONTROL REGISTER
Address: 0x28, Reset: 0x00, Name: INTERPOLATION_CTRL
Table 63. Bit Descriptions for INTERPOLATION_CTRL
Bits
Bit Name
Settings
Description
Reset
Access
[1:0]
INTERPOLATION_MODE
Interpolation rate and mode selection.
0x0
RW
00
2× Mode; use HB1 filter.
10
4× mode; use HB1 and HB2 filters.
11
8× mode; use all three filters (HB1, HB2, and HB3).
OVER THRESHOLD CONTROL 0 REGISTER
Address: 0x29, Reset: 0x00, Name: OVER_THRESHOLD_CTRL0
Table 64. Bit Descriptions for OVER_THRESHOLD_CTRL0
Bits
Bit Name
Settings
Description
Reset
Access
[7:0]
THRESHOLD_LEVEL_REQUEST_LSB
These bits, along with Bits[4:0] in Register 0x2A, set the
minimum average input power (I2 + Q2) to trigger the
input power protection function.
0x0
RW
OVER THRESHOLD CONTROL 1 REGISTER
Address: 0x2A, Reset: 0x00, Name: OVER_THRESHOLD_CTRL1
Table 65. Bit Descriptions for OVER_THRESHOLD_CTRL1
Bits
Bit Name
Settings
Description
Reset
Access
[4:0]
THRESHOLD_LEVEL_REQUEST_MSB
These bits, along with Bits[7:0] in Register 0x29, set the
minimum average input power (I2 + Q2) to trigger the
input power protection function.
0x00
RW
OVER THRESHOLD CONTROL 2 REGISTER
Address: 0x2B, Reset: 0x00, Name: OVER_THRESHOLD_CTRL2
Table 66. Bit Descriptions for OVER_THRESHOLD_CTRL2
Bits
Bit Name
Settings
Description
Reset
Access
7
ENABLE_PROTECTION
Enable input power protection.
0x0
RW
6
IQ_DATA_SWAP
Swap I and Q data in average power calculation.
0x0
RW
[3:0]
SAMPLE_WINDOW_LENGTH
Number of data input samples for power averaging.
0x0
RW
0000
512 IQ data sample pairs.
0001
1024 IQ data sample pairs.
…
1010
219 IQ data sample pairs.
1011 to
1111
invalid.
INPUT POWER READBACK LSB REGISTER
Address: 0x2C, Reset: 0x00, Name: INPUT_POWER_READBACK_LSB
Table 67. Bit Descriptions for INPUT_POWER_READBACK_LSB
Bits
Bit Name
Settings
Description
Reset
Access
[7:0]
INPUT_POWER_READBACK_LSB
These bits, along with Bits[4:0] in Register 0x2D, set the
input signal average power readback.
0x0
R
Rev. A | Page 62 of 72



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