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AD9142ABCPZRL 数据表(PDF) 55 Page - Analog Devices

部件名 AD9142ABCPZRL
功能描述  Multiple chip synchronization
PDF  73 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9142ABCPZRL 数据表(HTML) 55 Page - Analog Devices

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AD9142A
Data Sheet
INTERRUPT SELECT0 REGISTER
Address: 0x07, Reset: 0x00, Name: IRQ_SEL0
Table 32. Bit Descriptions for IRQ_SEL0
Bits
Bit Name
Settings
Description
Reset
Access
6
SEL_SYNC_LOST
0
Selects the IRQ1 pin.
0
RW
1
Selects the IRQ2 pin.
5
SEL_SYNC_LOCKED
0
Selects the IRQ1 pin.
0
RW
1
Selects the IRQ2 pin.
4
SEL_SYNC_DONE
0
Selects the IRQ1 pin.
0
RW
1
Selects the IRQ2 pin.
3
SEL_PLL_LOST
0
Selects the IRQ1 pin.
0
RW
1
Selects the IRQ2 pin.
2
SEL_PLL_LOCKED
0
Selects the IRQ1 pin.
0
RW
1
Selects the IRQ2 pin.
1
SEL_OVER_THRESHOLD
0
Selects the IRQ1 pin.
0
RW
1
Selects the IRQ2 pin.
0
SEL_DACOUT_MUTED
0
Selects the IRQ1 pin.
0
RW
INTERRUPT SELECT1 REGISTER
Address: 0x08, Reset: 0x00, Name: IRQ_SEL1
Table 33. Bit Descriptions for IRQ_SEL1
Bits
Bit Name
Settings
Description
Reset
Access
7
SEL_PARITY_FAIL
1
Selects the IRQ2 pin.
0
RW
0
Selects the IRQ1 pin.
6
SEL_SED_FAIL
1
Selects the IRQ2 pin.
0
RW
0
Selects the IRQ1 pin.
5
SEL_DLL_WARNING
0
Selects the IRQ1 pin.
0
RW
4
SEL_DLL_LOCKED
1
Selects the IRQ2 pin.
0
RW
0
Selects the IRQ1 pin.
2
SEL_FIFO_UNDERFLOW
1
Selects the IRQ2 pin.
0
RW
0
Selects the IRQ1 pin.
1
SEL_FIFO_OVERFLOW
1
Selects the IRQ2 pin.
0
RW
0
Selects the IRQ1 pin.
0
SEL_FIFO_WARNING
1
Selects the IRQ2 pin.
0
RW
0
Selects the IRQ1 pin.
FRAME MODE REGISTER
Address: 0x09, Reset: 0x00, Name: FRAME_MODE
Table 34. Bit Descriptions for FRAME_MODE
Bits
Bit Name
Description
Reset
Access
5
PARUSAGE
Must set to 1 when parity is used
0
RW
4
FRMUSAGE
Must set to 1 when frame is used.
0
RW
[1:0]
FRAME_PIN_USAGE
0 = no effect.
1 = parity.
2 = frame.
3 = reserved.
0x0
RW
Rev. A | Page 54 of 72



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