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AD9142ABCPZRL 数据表(PDF) 54 Page - Analog Devices

部件名 AD9142ABCPZRL
功能描述  Multiple chip synchronization
PDF  73 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9142ABCPZRL 数据表(HTML) 54 Page - Analog Devices

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Data Sheet
AD9142A
INTERRUPT ENABLE1 REGISTER
Address: 0x04, Reset: 0x00, Name: INTERRUPT_ENABLE1
Table 29. Bit Descriptions for INTERRUPT_ENABLE1
Bits
Bit Name
Settings
Description
Reset
Access
7
ENABLE_PARITY_FAIL
Enable interrupt for parity failure.
0
RW
6
ENABLE_SED_FAIL
Enable interrupt for SED failure.
0
RW
5
ENABLE_DLL_WARNING
Enable interrupt for DLL warning.
0
RW
4
ENABLE_DLL_LOCKED
Enable interrupt for DLL locked.
0
RW
2
ENABLE_FIFO_UNDERFLOW
Enable interrupt for FIFO underflow.
0
RW
1
ENABLE_FIFO_OVERFLOW
Enable interrupt for FIFO overflow.
0
RW
0
ENABLE_FIFO_WARNING
Enable interrupt for FIFO warning.
0
RW
INTERRUPT FLAG0 REGISTER
Address: 0x05, Reset: 0x00, Name: INTERRUPT_FLAG0
Table 30. Bit Descriptions for INTERRUPT_FLAG0
Bits
Bit Name
Settings
Description
Reset
Access
6
SYNC_LOST
SYNC_LOST is set to 1 when sync is lost.
0
R
5
SYNC_LOCKED
SYNC_LOCKED is set to 1 when sync is locked.
0
R
4
SYNC_DONE
SYNC_DONE is set to 1 when sync is done.
0
R
3
PLL_LOST
PLL_LOST is set to 1 when PLL loses lock.
0
R
2
PLL_LOCKED
PLL_LOCKED is set to 1 when PLL is locked.
0
R
1
OVER_THRESHOLD
OVER_THRESHOLD is set to 1 when input power is overthreshold.
0
R
0
DACOUT_MUTED
DACOUT_MUTED is set to 1 when the DAC output is muted (midscale dc).
0
R
INTERRUPT FLAG1 REGISTER
Address: 0x06, Reset: 0x00, Name: INTERRUPT_FLAG1
Table 31. Bit Descriptions for INTERRUPT_FLAG1
Bits
Bit Name
Settings
Description
Reset
Access
7
PARITY_FAIL
PARITY_FAIL is set to 1 when the parity check fails.
0
R
6
SED_FAIL
SED_FAIL is set to 1 when the SED comparison fails.
0
R
5
DLL_WARNING
DLL_WARNING is set to 1 when the DLL raises a warning.
0
R
4
DLL_LOCKED
DLL_LOCKED is set to 1 when the DLL is locked.
0
R
2
FIFO_UNDERFLOW
FIFO_UNDERFLOW is set to 1 when the FIFO read pointer
catches the FIFO write pointer.
0
R
1
FIFO_OVERFLOW
FIFO_OVERFLOW is set to 1 when the when the FIFO
read pointer catches the FIFO read pointer.
0
R
0
FIFO_WARNING
FIFO_WARNING is set to 1 when the FIFO is one slot from
empty (≤1) or full (≥6).
0
R
Rev. A | Page 53 of 72



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