AD9142ABCPZRL datasheet(56/73 Pages) AD

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Data Sheet

AD9142A

DATA CONTROL 0 REGISTER

Address: 0x0A, Reset: 0x40, Name: DATA_CNTR_0

Table 35. Bit Descriptions for DATA_CNTR_0

Bits

Bit Name

Description

Reset

Access

DLL_ENABLE

1 = enable DLL.

0 = disable DLL.

DUTY_CORRECTION_ENABLE

1 = enable duty cycle correction.

0 = disable duty cycle correction.

[3:0]

DLL_PHASE_OFFSET

Locked phase = 90° + n ×11.25°, where n is the 4 bit signed magnitude

number. Valid phase setting ranges from −6 to +6, 13 phases in total.

0x0

DATA CONTROL 1 REGISTER

Address: 0x0B, Reset: 0x39, Name: DATA_CNTR_1

Table 36. Bit Descriptions for DATA_CNTR_1

Bits

Bit Name

Description

Reset

Access

CLEAR_WARN

1= clears data receiver warning bits (Register 0x0E[6:4]).

[6:0]

Reserved

Must write the default value for optimal performance.

0x39

DATA CONTROL 2 REGISTER

Address: 0x0C, Reset: 0x64, Name: DATA_CNTR_2

Table 37. Bit Descriptions for DATA_CNTR_2

Bits

Bit Name

Description

Reset

Access

[7:0]

Reserved

Must write the default value for optimal performance.

0x64

DATA CONTROL 3 REGISTER

Address: 0x0D, Reset: 0x06, Name: DATA_CNTR_3

Table 38. Bit Descriptions for DATA_CNTR_3

Bits

Bit Name

Description

Reset

Access

LOW_DCI_EN

Set to 0 when DLL is enabled and DCI rate is ≥350 MHz.

Set to 1 when DLL is enabled and DCI rate is <350 MHz.

DC_COUPLE_LOW_EN

Set to 0 when DLL is enabled and delay line is disabled.

Set to 1 when DLL is disabled and delay line is enabled.

It is recommended that DLL mode be used for a DCI rate faster than 250 MHz

and the delay line mode be used for DCI rate slower than 250 MHz.

[3:0]

Reserved

Must write the default value for optimal performance.

0x6

DATA STATUS 0 REGISTER

Address: 0x0E, Reset: 0x00, Name: DATA_STAT_0

Table 39. Bit Descriptions for DATA_STAT_0

Bits

Bit Name

Description

Reset

Access

DLL_LOCK

1 = DLL lock.

DLL_WARN

1 = DLL near beginning/end of delay line.

DLL_START_WARNING

1 = DLL at beginning of delay line.

DLL_END_WARNING

1 = DLL at end of delay line.

Reserved

Reserved.

DCI_ON

1 = user has provided a clock >100 MHz.

Reserved

Reserved.

DLL_RUNNING

1 = closed loop DLL attempting to lock.

0 = delay fixed at middle of delay line.

Rev. A | Page 55 of 72

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