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AD9142ABCPZRL 数据表(PDF) 8 Page - Analog Devices

部件名 AD9142ABCPZRL
功能描述  Multiple chip synchronization
PDF  73 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9142ABCPZRL 数据表(HTML) 8 Page - Analog Devices

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Data Sheet
AD9142A
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
8× Mode
fDAC = 1600 MSPS
NCO OFF
1350
mW
NCO ON
1984
mW
Phase-Lock Loop (PLL)
70
mW
Inverse Sinc
fDAC = 1474.56 MSPS
113
mW
Reduced Power Mode (Power-Down)
96.6
mW
AVDD33
1.5
mA
CVDD18
42.3
mA
DVDD18
8.6
mA
OPERATING RANGE
−40
+25
+85
°C
1
This term specifies the maximum allowable variation of DVDD18 over operating conditions compared with the DVDD18 presented to the device at the time the data
interface DLL is enabled.
Rev. A | Page 7 of 72



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