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AD9142ABCPZRL 数据表(PDF) 6 Page - Analog Devices

部件名 AD9142ABCPZRL
功能描述  Multiple chip synchronization
PDF  73 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9142ABCPZRL 数据表(HTML) 6 Page - Analog Devices

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Data Sheet
AD9142A
Rev. A | Page 5 of 72
FUNCTIONAL BLOCK DIAGRAM
Figure 1.
REF
AND
BIAS
FSADJ
VREF
POWER-ON
RESET
MULTICHIP
SYNCHRONIZATION
SERIAL
INPUT/OUTPUT
PORT
PROGRAMMING
REGISTERS
DACCLKP
DACCLKN
REFP/SYNCP
REFN/SYNCN
CLOCK
MULTIPLIER
CLK
RCVR
REF
RCVR
DAC_CLK
INPUT POWER
DETECTION
DLL
13-TAP
D15P/D15N
D0P/D0N
DCIP/DCIN
HB1
2×
HB2
2×
HB3
2×
COMPLEX
MODULATION
fDAC/4
MOD
NCO
DAC 1
16-BIT
IOUT1P
IOUT1N
16
DAC 2
16-BIT
IOUT2P
IOUT2N
16
10
10
INTERNAL CLOCK TIMING AND CONTROL LOGIC
DAC CLK
SYNC
AD9142A
FRAMEP/PARITYP
FRAMEN/PARITYN



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