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EM357-RTR 数据表(PDF) 108 Page - Silicon Laboratories |
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EM357-RTR 数据表(HTML) 108 Page - Silicon Laboratories |
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108 / 241 page ![]() Rev 1.3 108 SC1_RXENDA: Address: 0x4000C804 Reset: 0x20000000 SC2_RXENDA: Address: 0x4000C004 Reset: 0x20000000 SC1_RXENDB: Address: 0x4000C80C Reset: 0x20000000 SC2_RXENDB: Address: 0x4000C00C Reset: 0x20000000 Register 8.26. SCx_RXENDA SC1_RXENDA: Receive DMA End Address Register A SC2_RXENDA: Receive DMA End Address Register A Bit 31 30 29 28 27 26 25 24 Name 0 0 1 0 0 0 0 0 Bit 23 22 21 20 19 18 17 16 Name 0 0 0 0 0 0 0 0 Bit 15 14 13 12 11 10 9 8 Name 0 0 SC_RXENDA Bit 7 6 5 4 3 2 1 0 Name SC_RXENDA Bitname Bitfield Access Description SC_RXENDA [13:0] RW Address of the last byte that will be written in the DMA receive buffer A. Register 8.27. SCx_RXENDB SC1_RXENDB: Receive DMA End Address Register B SC2_RXENDB: Receive DMA End Address Register B Bit 31 30 29 28 27 26 25 24 Name 0 0 1 0 0 0 0 0 Bit 23 22 21 20 19 18 17 16 Name 0 0 0 0 0 0 0 0 Bit 15 14 13 12 11 10 9 8 Name 0 0 SC_RXENDB Bit 7 6 5 4 3 2 1 0 Name SC_RXENDB Bitname Bitfield Access Description SC_RXENDB [13:0] RW Address of the last byte that will be written in the DMA receive buffer B. |
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