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EM357-RTR 数据表(PDF) 162 Page - Silicon Laboratories

部件名 EM357-RTR
功能描述  High-Performance, Integrated ZigBee/802.15.4 System-on-Chip
PDF  241 Pages
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制造商  SILABS [Silicon Laboratories]
网页  http://www.silabs.com
标志 SILABS - Silicon Laboratories

EM357-RTR 数据表(HTML) 162 Page - Silicon Laboratories

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Rev 1.3
162
TIM1_CNT: Address: 0x4000E024 Reset: 0x0
TIM2_CNT: Address: 0x4000F024 Reset: 0x0
TIM1_PSC: Address: 0x4000E028 Reset: 0x0
TIM2_PSC: Address: 0x4000F028 Reset: 0x0
Register 9.8. TIMx_CNT
TIM1_CNT: Timer 1 Counter Register
TIM2_CNT: Timer 2 Counter Register
Bit
31
30
29
28
27
26
25
24
Name
0
0
0
0
0
0
0
0
Bit
23
22
21
20
19
18
17
16
Name
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
Name
TIM_CNT
Bit
7
6
5
4
3
2
1
0
Name
TIM_CNT
Bitname
Bitfield
Access
Description
TIM_CNT
[15:0]
RW
Counter value.
Register 9.9. TIMx_PSC
TIM1_PSC: Timer 1 Prescaler Register
TIM2_PSC: Timer 2 Prescaler Register
Bit
31
30
29
28
27
26
25
24
Name
0
0
0
0
0
0
0
0
Bit
23
22
21
20
19
18
17
16
Name
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
Name
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
Name
0
0
0
0
TIM_PSC
Bitname
Bitfield
Access
Description
TIM_PSC
[3:0]
RW
The prescaler divides the internal timer clock frequency. The counter clock
frequency CK_CNT is equal to fCK_PSC / (2 ^ TIM_PSC). Clock division
factors can range from 1 through 32768. The division factor is loaded into
the shadow prescaler register at each UEV (including when the counter is
cleared through TIM_UG bit of TMR1_EGR register or through the trigger
controller when configured in reset mode).



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