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ADAU1772BCPZ-R7 数据表(PDF) 109 Page - Analog Devices |
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ADAU1772BCPZ-R7 数据表(HTML) 109 Page - Analog Devices |
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109 / 117 page ![]() ADAU1772 Data Sheet Rev. C | Page 108 of 116 Bits Bit Name Settings Description Reset Access [5:4] AFE_IBIAS23 Analog Front-End 2 and Analog Front-End 3 bias current setting. Higher bias currents result in higher performance. 0x0 RW 00 Normal operation (default) 01 Extreme power saving 10 Enhanced performance 11 Power saving [3:2] MIC_IBIAS Microphone input bias current setting. Higher bias currents result in higher performance. 0x0 RW 00 Normal operation (default) 01 Extreme power saving 10 Enhanced performance 11 Power saving [1:0] DAC_IBIAS DAC bias current setting. Higher bias currents result in higher performance. 0x0 RW 00 Normal operation (default) 01 Power saving 10 Superior performance 11 Enhanced performance DIGITAL PIN PULL-UP CONTROL 0 REGISTER Address: 0x0048, Reset: 0x7F, Name: PAD_CONTROL0 Controls the behavior of the pad. Possible to enable pull-up. Table 99. Bit Descriptions for PAD_CONTROL0 Bits Bit Name Settings Description Reset Access 6 DMIC2_3_PU Pull-up disable. 0x1 RW 0 Pull-up enabled 1 Pull-up disabled 5 DMIC0_1_PU Pull-up disable. 0x1 RW 0 Pull-up enabled 1 Pull-up disabled 4 LRCLK_PU Pull-up disable. 0x1 RW 0 Pull-up enabled 1 Pull-up disabled |
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