Z8F021ASH020SC datasheet(189/276 Pages) ZILOG

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PS022815-0206

On-Chip Debugger

Z8 Encore! XP® 4K Series

Product Specification

170

• Power-on reset

• Voltage Brown-Out reset

• Watch-Dog Timer reset

• Asserting the RESET pin Low to initiate a Reset.

• Driving the DBG pin Low while the device is in STOP mode initiates a System Reset.

OCD Data Format

The OCD interface uses the asynchronous data format defined for RS-232. Each character

is transmitted as 1 Start bit, 8 data bits (least-significant bit first), and 1.5 Stop bits as

shown in Figure 26.

Figure 26.OCD Data Format

OCD Auto-Baud Detector/Generator

To run over a range of baud rates (data bits per second) with various system clock frequen-

cies, the On-Chip Debugger contains an Auto-Baud Detector/Generator. After a reset, the

OCD is idle until it receives data. The OCD requires that the first character sent from the

host is the character 80H. The character 80H has eight continuous bits Low (one Start bit

plus 7 data bits), framed between High bits. The Auto-Baud Detector measures this period

and sets the OCD Baud Rate Generator accordingly.

The Auto-Baud Detector/Generator is clocked by the system clock. The minimum baud

rate is the system clock frequency divided by 512. For optimal operation with asynchro-

nous datastreams, the maximum recommended baud rate is the system clock frequency

divided by 8. The maximum possible baud rate for asynchronous datastreams is the sys-

tem clock frequency divided by 4, but this theoretical maximum is possible only for low

noise designs with clean signals. Table 108 lists minimum and recommended maximum

baud rates for sample crystal frequencies.

Table 108. OCD Baud-Rate Limits

System Clock Frequency

(MHz)

Recommended

Maximum Baud

Rate (Kbps)

Recommended

Standard PC Baud

Rate (bps)

Minimum Baud

Rate (Kbps)

20.0

2500.0

1,843,200

START

D4D5D6D7

STOP

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