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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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Z8F021ASH020SC 数据表(PDF) 225 Page - Zilog, Inc. |
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Z8F021ASH020SC 数据表(HTML) 225 Page - Zilog, Inc. |
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225 / 276 page  PS022815-0206 eZ8 CPU Instruction Set Z8 Encore! XP® 4K Series Product Specification 206 SUBX dst, src dst ← dst – src ER ER 28 * ***1 * 4 3 ER IM 29 4 3 SWAP dst dst[7:4] ↔ dst[3:0] R F0 X * * X – – 2 2 IR F1 2 3 TCM dst, src (NOT dst) AND src r r 62 – * * 0 – – 2 3 rIr 63 2 4 RR 64 3 3 RIR 65 3 4 RIM 66 3 3 IR IM 67 3 4 TCMX dst, src (NOT dst) AND src ER ER 68 – * * 0 – – 4 3 ER IM 69 4 3 TM dst, src dst AND src r r 72 – * * 0 – – 2 3 rIr 73 2 4 RR 74 3 3 RIR 75 3 4 RIM 76 3 3 IR IM 77 3 4 TMX dst, src dst AND src ER ER 78 – * * 0 – – 4 3 ER IM 79 4 3 TRAP Vector SP ← SP – 2 @SP ← PC SP ← SP – 1 @SP ← FLAGS PC ← @Vector Vector F2 – ––– – – 2 6 WDT 5F – ––– – – 1 2 Table 127. eZ8 CPU Instruction Summary (Continued) Assembly Mnemonic Symbolic Operation Address Mode Opcode(s) (Hex) Flags Fetch Cycles Instr. Cycles dst src C Z S V D H Flags Notation: * = Value is a function of the result of the operation. – = Unaffected X = Undefined 0 = Reset to 0 1 = Set to 1 |
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