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Z8F021ASH020SC 数据表(PDF) 222 Page - Zilog, Inc. |
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Z8F021ASH020SC 数据表(HTML) 222 Page - Zilog, Inc. |
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222 / 276 page ![]() PS022815-0206 eZ8 CPU Instruction Set Z8 Encore! XP® 4K Series Product Specification 203 LDC dst, src dst ← src r Irr C2 – ––– – – 2 5 Ir Irr C5 2 9 Irr r D2 2 5 LDCI dst, src dst ← src r ← r + 1 rr ← rr + 1 Ir Irr C3 – ––– – – 2 9 Irr Ir D3 2 9 LDE dst, src dst ← src r Irr 82 – ––– – – 2 5 Irr r 92 2 5 LDEI dst, src dst ← src r ← r + 1 rr ← rr + 1 Ir Irr 83 – ––– – – 2 9 Irr Ir 93 2 9 LDWX dst, src dst ← src ER ER 1FE8 – ––– – – 5 4 LDX dst, src dst ← src r ER 84 – ––– – – 3 2 Ir ER 85 3 3 RIRR 86 3 4 IR IRR 87 3 5 r X(rr) 88 3 4 X(rr) r 89 3 4 ER r 94 3 2 ER Ir 95 3 3 IRR R 96 3 4 IRR IR 97 3 5 ER ER E8 4 2 ER IM E9 4 2 LEA dst, X(src) dst ← src + X r X(r) 98 – – – – – – 3 3 rr X(rr) 99 3 5 MULT dst dst[15:0] ← dst[15:8] * dst[7:0] RR F4 – ––– – – 2 8 NOP No operation 0F – – – – – – 1 2 Table 127. eZ8 CPU Instruction Summary (Continued) Assembly Mnemonic Symbolic Operation Address Mode Opcode(s) (Hex) Flags Fetch Cycles Instr. Cycles dst src C Z S V D H Flags Notation: * = Value is a function of the result of the operation. – = Unaffected X = Undefined 0 = Reset to 0 1 = Set to 1 |
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