| 数据搜索系统,热门电子元器件搜索 |
|
Z8F021ASH020SC 数据表(PDF) 220 Page - Zilog, Inc. |
|
|
|||||||||||||||||||||||||||||
Z8F021ASH020SC 数据表(HTML) 220 Page - Zilog, Inc. |
|
220 / 276 page ![]() PS022815-0206 eZ8 CPU Instruction Set Z8 Encore! XP® 4K Series Product Specification 201 COM dst dst ← ~dst R 60 – * * 0 – – 2 2 IR 61 2 3 CP dst, src dst - src r r A2 * ***– – 2 3 rIr A3 2 4 RR A4 3 3 RIR A5 3 4 RIM A6 3 3 IR IM A7 3 4 CPC dst, src dst - src - C r r 1F A2 * ***– – 3 3 rIr 1F A3 3 4 RR 1F A4 4 3 RIR 1F A5 4 4 RIM 1F A6 4 3 IR IM 1F A7 4 4 CPCX dst, src dst - src - C ER ER 1F A8 * ***– – 5 3 ER IM 1F A9 5 3 CPX dst, src dst - src ER ER A8 * ***– – 4 3 ER IM A9 4 3 DA dst dst ← DA(dst) R 40 * * * X – – 2 2 IR 41 2 3 DEC dst dst ← dst - 1 R 30 –***– – 2 2 IR 31 2 3 DECW dst dst ← dst - 1 RR 80 – ***– – 2 5 IRR 81 2 6 DI IRQCTL[7] ← 0 8F – ––– – – 1 2 DJNZ dst, RA dst ← dst – 1 if dst ≠ 0 PC ← PC + X r 0A-FA – ––– – – 2 3 EI IRQCTL[7] ← 1 9F – ––– – – 1 2 Table 127. eZ8 CPU Instruction Summary (Continued) Assembly Mnemonic Symbolic Operation Address Mode Opcode(s) (Hex) Flags Fetch Cycles Instr. Cycles dst src C Z S V D H Flags Notation: * = Value is a function of the result of the operation. – = Unaffected X = Undefined 0 = Reset to 0 1 = Set to 1 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |