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Z8F021ASH020SC 数据表(PDF) 223 Page - Zilog, Inc. |
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Z8F021ASH020SC 数据表(HTML) 223 Page - Zilog, Inc. |
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223 / 276 page ![]() PS022815-0206 eZ8 CPU Instruction Set Z8 Encore! XP® 4K Series Product Specification 204 OR dst, src dst ← dst OR src r r 42 – * * 0 – – 2 3 rIr 43 2 4 RR 44 3 3 RIR 45 3 4 RIM 46 3 3 IR IM 47 3 4 ORX dst, src dst ← dst OR src ER ER 48 – * * 0 – – 4 3 ER IM 49 4 3 POP dst dst ← @SP SP ← SP + 1 R 50 – ––– – – 2 2 IR 51 2 3 POPX dst dst ← @SP SP ← SP + 1 ER D8 – ––– – – 3 2 PUSH src SP ← SP – 1 @SP ← src R 70 – ––– – – 2 2 IR 71 2 3 IM IF70 3 2 PUSHX src SP ← SP – 1 @SP ← src ER C8 – ––– – – 3 2 RCF C ← 0 CF 0 ––– – – 1 2 RET PC ← @SP SP ← SP + 2 AF – ––– – – 1 4 RL dst R 90 * ***– – 2 2 IR 91 2 3 RLC dst R 10 * ***– – 2 2 IR 11 2 3 Table 127. eZ8 CPU Instruction Summary (Continued) Assembly Mnemonic Symbolic Operation Address Mode Opcode(s) (Hex) Flags Fetch Cycles Instr. Cycles dst src C Z S V D H Flags Notation: * = Value is a function of the result of the operation. – = Unaffected X = Undefined 0 = Reset to 0 1 = Set to 1 D7 D6 D5 D4 D3 D2 D1 D0 dst C D7 D6 D5 D4 D3 D2 D1 D0 dst C |
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