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Z8F021ASH020SC 数据表(PDF) 218 Page - Zilog, Inc.

部件名 Z8F021ASH020SC
功能描述  Z8 Encore XP-R 4K Series High-Performance 8-Bit Microcontrollers
PDF  276 Pages
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制造商  ZILOG [Zilog, Inc.]
网页  http://www.zilog.com
标志 ZILOG - Zilog, Inc.

Z8F021ASH020SC 数据表(HTML) 218 Page - Zilog, Inc.

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PS022815-0206
eZ8 CPU Instruction Set
Z8 Encore! XP® 4K Series
Product Specification
199
eZ8 CPU Instruction Summary
Table 127 summarizes the eZ8 CPU instructions. The table identifies the addressing
modes employed by the instruction, the effect upon the Flags register, the number of CPU
clock cycles required for the instruction fetch, and the number of CPU clock cycles
required for the instruction execution.
.
SRL
dst
Shift Right Logical
SWAP
dst
Swap Nibbles
Table 127. eZ8 CPU Instruction Summary
Assembly
Mnemonic
Symbolic Operation
Address Mode
Opcode(s)
(Hex)
Flags
Fetch
Cycles
Instr.
Cycles
dst
src
C Z S V D
H
ADC dst, src
dst
← dst + src + C
r
r
12
*
***0
*
2
3
rIr
13
2
4
RR
14
3
3
RIR
15
3
4
RIM
16
3
3
IR
IM
17
3
4
ADCX dst, src
dst
← dst + src + C
ER
ER
18
*
***0
*
4
3
ER
IM
19
4
3
ADD dst, src
dst
← dst + src
r
r
02
*
***0
*
2
3
rIr
03
2
4
RR
04
3
3
RIR
05
3
4
RIM
06
3
3
IR
IM
07
3
4
ADDX dst, src
dst
← dst + src
ER
ER
08
*
***0
*
4
3
ER
IM
09
4
3
Flags Notation:
* = Value is a function of the result of the operation.
– = Unaffected
X = Undefined
0 = Reset to 0
1 = Set to 1
Table 126. Rotate and Shift Instructions
Mnemonic
Operands
Instruction



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