| 数据搜索系统,热门电子元器件搜索 |
|
DRV8317 数据表(PDF) 54 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
DRV8317 数据表(HTML) 54 Page - Texas Instruments |
|
54 / 69 page ![]() 8.6.16 SYS_CTRL Register (Offset = 3Fh) [Reset = 5008h] SYS_CTRL is shown in Figure 8-43 and described in Table 8-26. Return to the Table 8-9. Figure 8-43. SYS_CTRL Register 15 14 13 12 11 10 9 8 PARITY WRITE_KEY RESERVED RESERVED RESERVED R/W-0h W-5h R-0-0h R/W-0h R/W-0h 7 6 5 4 3 2 1 0 REG_LOCK SPI_PEN RESERVED RESERVED RESERVED R/W-0h R/W-0h R/W-0h R/W-1h R/W-0h Table 8-26. SYS_CTRL Register Field Descriptions Bit Field Type Reset Description 15 PARITY R/W 0h Parity Bit if SPI_PEN is set to '1' otherwise reserved 14-12 WRITE_KEY W 5h 0x5 : Write Key specific to this register. 11-10 RESERVED R-0 0h Reserved 9 RESERVED R/W 0h Reserved 8 RESERVED R/W 0h Reserved 7 REG_LOCK R/W 0h Register Lock Bit 0h = Registers Unlocked 1h = Registers Locked 6 SPI_PEN R/W 0h Parity Enable for SPI 0h = Parity Disabled 1h = Parity Enabled 5-4 RESERVED R/W 0h Reserved 3 RESERVED R/W 1h Reserved 2-0 RESERVED R/W 0h Reserved DRV8317 SLVSGT3 – DECEMBER 2022 www.ti.com 54 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: DRV8317 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |