DRV8317 datasheet(3/69 Pages) TI

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5 Device Comparison Table

DEVICE

PACKAGES

INTERFACE

DRV8317S

36-pin WQFN (5-mm x 4-mm)

SPI

DRV8317H

Hardware (Pin)

Table 5-1. DRV8317S vs DRV8317H Configuration Comparison

Parameters

DRV8317S

DRV8317H

PWM control mode

PWM_MODE (4 settings)

MODE pin (2 settings)

Slew rate

SLEW_RATE (4 settings)

SLEW pin (4 settings)

Current sense amplifier gain

CSA_GAIN (4 settings)

GAIN pin (4 settings)

OCP blanking time

OCP_TBLANK (4 settings)

Fixed to 0.7-µs

OCP deglitch time

OCP_DEG (4 settings)

Fixed to 0.6-µs

OCP mode

OCP_MODE (4 settings), Configurable retry

time

5-ms automatic retry

Dead time

Fixed based on SLEW_RATE setting

Fixed based on SLEW pin setting

Propagation delay

Fixed based on SLEW_RATE setting

Fixed based on SLEW pin setting

Driver delay compensation

DLYCMP_EN (2 settings)

Disabled

Spread Spectrum Clock for internal oscillator

SSC_DIS (2 settings)

Enabled

VM under voltage lockout

VM under voltage protection always enabled.

VM under voltage protection mode set

by UVP_MODE (2 settings); configurable

retry time using SLOW_TRETRY and

FAST_TRETRY.

VM under voltage protection always enabled.

Auto-retry mode for VM under voltage with

5-ms retry time.

VIN_AVDD, AVDD under voltage lockout

VIN_AVDD and AVDD under voltage

protection always enabled. Device resets on

VIN_AVDD or AVDD under voltage.

VIN_AVDD and AVDD under voltage

protection always enabled. Device resets on

VIN_AVDD or AVDD under voltage.

CP under voltage lockout

CP under voltage protection always enabled.

CP under voltage protection mode set

by UVP_MODE (2 settings); configurable

retry time using SLOW_TRETRY and

FAST_TRETRY.

CP under voltage protection always enabled.

Auto-retry mode for CP under voltage with

5-ms retry time.

VM over voltage

OVP_MODE (2 settings); configurable

retry time using SLOW_TRETRY and

FAST_TRETRY

5-ms automatic retry

SPI fault

SPIFLT_MODE (2 settings)

N/A

FET over temperature warning (OTW_FET)

Enable/disable using OTW_FET_EN. If

enabled, over temperature warning is

reported on nFAULT pin and OTW_FET bit

in OT_STS register.

Disabled

FET over temperature shutdown (OTS_FET)

OTF_MODE (2 settings); configurable

retry time using SLOW_TRETRY and

FAST_TRETRY

5-ms automatic retry

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DRV8317

SLVSGT3 – DECEMBER 2022

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