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DRV8317 数据表(PDF) 28 Page - Texas Instruments |
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DRV8317 数据表(HTML) 28 Page - Texas Instruments |
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28 / 69 page ![]() The amplifier has a defined linear region as shown in Figure 8-21. 0-A VREF/2 VSOX(off)max VSOX(off)min VREF 0.25-V 0-V IOUTx SOX VOFF, VDRIFT VSOX(range+) VSOX(range-) -IOUTx (VREF – 0.25) V Figure 8-21. Bi-directional Current Sense Linear Region Note The current sense amplifiers use the external voltage reference (VREF) provided at the CSAREF pin. 8.3.11 Protections The DRV8317 is protected against VM, VIN_AVDD, AVDD, CP under voltage, VM over voltage, SPI fault, OTP read fault, FET over current and FET, LDO over temperature events. Table 8-6 summarizes various fault details. Table 8-6. Fault Action and Response FAULT CONDITION CONFIGURATION REPORT PRE-DRIVER FAULT STATUS BITS DIGITAL RECOVERY VM under voltage lockout (VM_UV) VVM < VUVLO (falling) UVP_MODE = 00b nFAULT Hi-Z Latched Active Automatic: SLOW_TRETRY and VVM > VUVLO (rising) UVP_MODE = 01b nFAULT Hi-Z Latched Active Automatic: FAST_TRETRY and VVM > VUVLO (rising) VM under voltage warning (VMUV_WARN) VVM < VVMUV_WARN_FALL VMUV_WARN_MODE = 00b nFAULT Hi-Z Latched Active Automatic: SLOW_TRETRY and VVM > VVMUV_WARN_RISE VMUV_WARN_MODE = 01b nFAULT Hi-Z Latched Active Automatic: FAST_TRETRY and VVM > VVMUV_WARN_RISE VMUV_WARN_MODE = 10b nFAULT Active Latched Active No action; report only mode VMUV_WARN_MODE = 11b — Active — Active — VIN_AVDD under voltage (VIN_AVDD_UV) VVIN_AVDD < VVIN_AVDD_UV (falling) — — Hi-Z — Reset Automatic: VVIN_AVDD > VVIN_AVDD_UV (rising) AVDD under voltage (AVDD_UV) VAVDD < VAVDD_UV (falling) — — Hi-Z — Reset Automatic: VAVDD > VAVDD_UV (rising) Charge pump under voltage (CP_UV) VCP < VCPUV (falling) UVP_MODE = 00b nFAULT Hi-Z Latched Active Automatic: SLOW_TRETRY and VCP > VCPUV (rising) UVP_MODE = 01b nFAULT Hi-Z Latched Active Automatic: FAST_TRETRY and VCP > VCPUV (rising) Over current protection (OCP) IPHASE > IOCP OCP_MODE = 000b nFAULT Hi-Z Latched Active Automatic: SLOW_TRETRY OCP_MODE = 001b nFAULT Hi-Z Latched Active Automatic: FAST_TRETRY OCP_MODE = 010b nFAULT Hi-Z Latched Active Latched: Cleared by FLT_CLR bit or nSLEEP reset pulse OCP_MODE = 011b nFAULT Active Latched Active No action; report only mode DRV8317 SLVSGT3 – DECEMBER 2022 www.ti.com 28 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: DRV8317 |
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