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DRV8317 数据表(PDF) 13 Page - Texas Instruments |
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DRV8317 数据表(HTML) 13 Page - Texas Instruments |
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13 / 69 page  TJ = –40°C to +150°C, VVM = 4.5 to 20 V (unless otherwise noted). Typical limits apply for TA = 25°C, VVM = 12 V PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tOCP (1) Overcurrent protection deglitch time OCP_DEG = 00b 0.1 0.3 0.45 µs OCP_DEG = 01b 0.35 0.6 0.85 µs OCP_DEG = 10b 0.6 0.9 1.25 µs OCP_DEG = 11b 0.8 1.2 1.5 µs tOCP (1) Overcurrent protection deglitch time (HW Variant) 0.35 0.6 0.85 µs tRETRY Overcurrent protection retry time FAST_TRETRY = 00b 0.35 0.5 0.7 ms FAST_TRETRY = 01b 0.75 1 1.3 ms FAST_TRETRY = 10b 1.65 2 2.45 ms FAST_TRETRY = 11b 4.35 5 5.85 ms tRETRY Overcurrent protection retry time SLOW_TRETRY = 00b 350 500 700 ms SLOW_TRETRY = 01b 750 1000 1300 ms SLOW_TRETRY = 10b 1650 2000 2450 ms SLOW_TRETRY = 11b 4350 5000 5850 ms tRETRY Overcurrent protection retry time (HW Variant) 4.35 5 5.85 ms TOTW_FET Overtemperature warning threshold (FET) Die temperature (TJ) Rising 110 125 140 °C TOTW_HYS_F ET Overtemperature warning hysteresis (FET) Die temperature (TJ) 15 20 25 °C TOTS_FET Overtemperature shutdown threshold (FET) Die temperature (TJ) Rising 145 160 175 °C TOTS_HYS_FE T Overtemperature shutdown hysteresis (FET) Die temperature (TJ) 14 20 25 °C TOTS_LDO Overtemperature shutdown threshold (LDO) Die temperature (TJ) Rising 145 160 175 °C TOTS_HYS_LD O Overtemperature shutdown hysteresis (LDO) Die temperature (TJ) 14 20 25 °C LOGIC-LEVEL INPUTS (INHx, INLx, nSLEEP, SCLK, SDI) VIL Input logic low voltage nSLEEP 0 0.7 V VIL Input logic low voltage SDI, INLx, INHx, SCLK 0 0.65 V VIH Input logic high voltage nSLEEP 1.7 5.5 V VIH Input logic high voltage SDI, INLx, INHx, SCLK 1.5 3.6 V VHYS Input logic hysteresis nSLEEP 200 600 mV VHYS Input logic hysteresis SDI, INLx, INHx, SCLK 200 500 mV IIL Input logic low current nSLEEP, SDI, INLx, INHx, SCLK (Pin Voltage) = 0 V –1 1 µA IIH Input logic high current nSLEEP (Pin Voltage) = 5V 40 µA Other pins, 3V ≤ VPIN (Pin Voltage) ≤ 3.6V 30 µA RPD Input pulldown resistance nSLEEP 150 300 kΩ SDI, SCLK, INHx, INLx 150 300 kΩ CID Input capacitance nSLEEP, SDI, SCLK, INHx, INLx 30 pF LOGIC-LEVEL INPUTS (nSCS) VIL Input logic low voltage 0 0.7 V VIH Input logic high voltage 1.5 3.6 V VHYS Input logic hysteresis 200 500 mV IIL Input logic low current VPIN (Pin Voltage) = 0 V 95 µA IIH Input logic high current 3V ≤ VPIN (Pin Voltage) ≤ 3.6V -1 1 µA www.ti.com DRV8317 SLVSGT3 – DECEMBER 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 13 Product Folder Links: DRV8317 |
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