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DRV8317 数据表(PDF) 57 Page - Texas Instruments |
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DRV8317 数据表(HTML) 57 Page - Texas Instruments |
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57 / 69 page ![]() Table 9-2. Summary of Delay Times in DRV8317 Depending on Logic Inputs and Output Current Direction (continued) OUTx Current Direction INHx INLx Propagation Delay (tPD) Dead Time (tDEAD) Inserted MCU Dead Time (tDEAD(MCU)) tDEAD(MCU) ≤ tDEAD tDEAD(MCU) > tDEAD Into OUTx Rising Falling ≤ tPD (typ.) ≤ tDEAD (typ.) Output dead time ≤ tDEAD (typ.) Output dead time < tDEAD(MCU) Falling Rising ≤ tPD (max) ≤ tDEAD (max) Output dead time ≤ tDEAD (max) Output dead time = tDEAD(MCU) 9.2.1.3 Delay Compensation Differences in delays of dead time and propagation delay can cause mismatch in the output timings of PWMs, which can lead to duty cycle distortion. In order to accommodate differences in propagation delay between the conditions mentioned in Table 9-2, DRV8317 integrates a delay compensation feature. Delay compensation is used to match delay times for currents going into and out of phase (OUTx) by adding a variable delay time (tvar) to match a preset target delay time equal to the propagation delay plus driver dead time (tPD + tDRV_DEAD). This (tvar) setting is automatically configured by the DRV8317 when the DLYCMP_EN bit is set to 1b. 9.2.1.4 Current Sensing and Output Filtering The SOx pins are typically sampled by an analog-to-digital converter in the MCU to calculate the phase current. Phase current information is used for closed-loop control such as Field-Oriented Control (FOC). An example calculation for phase current is shown in Equation 3. SOx = VREF/2 + GCSA * IOUTx (3) For example, in a system with VREF = 3-V, CSA gain = 0.5 V/A, and a SOx voltage of 1.2-V, phase current (IOUTx) = -0.6A. Sometimes high frequency noise can appear at the SOx signals based on voltage ripple at VREF, added inductance at the SOx traces, or routing of SOx traces near high frequency components. It is recommended to add a low-pass RC filter close to the MCU with cut-off frequency at least 10 times the PWM switching frequency for trapezoidal commutation and 100 times the PWM switching frequency for sinusoidal commutation to filter high frequency noise. A recommended RC filter is 330-ohms, 22-pF to add minimal parallel capacitance to the ADC and current mirroring circuitry without increasing the settling time of the CSA output. The cutoff frequency for the low-pass RC filter is in Equation 4. fc= 12πRC (4) www.ti.com DRV8317 SLVSGT3 – DECEMBER 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 57 Product Folder Links: DRV8317 |
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