DSP56303 datasheet(48/292 Pages) FREESCALE

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DSP56303 User’s Manual, Rev. 2

3-4

Freescale Semiconductor

Memory Configuration

3.3 Y Data Memory Space

The Y data memory space consists of the following:

Internal Y data memory (2 K by default up to 3 K)

External I/O space (upper 128 locations)

Optional off-chip memory expansion (up to 64 K in 16-bit mode, or 256 K in 24-bit mode

using the 18 external address lines, or 4 M using the external address lines and the four

address attribute lines). Refer to the DSP56300 Family Manual, especially Chapter 9,

External Memory Interface (Port A), for details on using the external memory interface to

access external Y data memory.

Note:

The Y memory space at $FF0000–$FFEFFF is reserved and should not be accessed.

3.3.1 Internal Y Data Memory

The default internal Y data RAM is a 24-bit-wide, internal, static memory occupying the lowest

2 K ($000–$7FF) of Y memory space. The internal Y data RAM is organized into 8 banks with

256 locations each. Available Y data memory space is increased by 1 K through reallocation of

program memory using the memory switch mode described in the next section.

3.3.2 Memory Switch Modes—Y Data Memory

Memory switch mode reallocates of portions of program RAM to X and Y data memory. Bit 7 in

the OMR is the MS bit that controls this function, as follows:

When the MS bit is cleared, the Y data memory consists of the default 2 K × 24-bit

memory space described in the previous section. In this default mode, the lowest external

Y data memory location is $800.

When the MS bit is set, a portion of the higher locations of the internal program memory is

switched to X and Y data memory. The Y data memory in this mode consists of a

3 K

× 24-bit memory space. In this mode, the lowest external Y data memory location is

$C00.

3.3.3 External I/O Space—Y Data Memory

The off-chip peripheral registers should be mapped into the top 128 locations of Y data memory

($FFFF80–$FFFFFF in the 24-bit Address mode or $FF80–$FFFF in the 16-bit Address mode)

to take advantage of the Move Peripheral Data (MOVEP) instruction and the bit-oriented

instructions (BCHG, BCLR, BSET, BTST, BRCLR, BRSET, BSCLR, BSSET, JCLR, JSET,

JSCLR, and JSSET).

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