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DSP56303 数据表(PDF) 50 Page - Freescale Semiconductor, Inc |
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DSP56303 数据表(HTML) 50 Page - Freescale Semiconductor, Inc |
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50 / 292 page  DSP56303 User’s Manual, Rev. 2 3-6 Freescale Semiconductor Memory Configuration The actual memory locations for Program RAM and the Instruction Cache in the Program memory space are determined by the MS and CE bits, and their addresses are given in Table 3-2. 3.7 Memory Maps The following figures describe each of the memory space and RAM configurations defined by the settings of the SC, MS, and CE bits. The figures show the configuration and the table describes the bit settings, memory sizes, and memory locations. Table 3-1. DSP56303 RAM Configurations Bit Settings Memory Sizes (in K) MS CE Program RAM X data RAM Y data RAM Cache 004220 013221 102330 111331 Table 3-2. DSP56303 RAM Address Ranges by Configuration MS CE Program RAM Location Cache Location 0 0 $000–$FFF N/A 0 1 $000–$BFF $C00–$FFF (internal location not accessible; address range assigned to external Program Memory) 1 0 $000–$7FF N/A 1 1 $000–$3FF $400–$7FF (internal location not accessible; addressed assigned to external Program Memory) |
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