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DSP56303 数据表(PDF) 16 Page - Freescale Semiconductor, Inc

部件名 DSP56303
功能描述  DSP56303 USER?셎 MANUAL
PDF  292 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

DSP56303 数据表(HTML) 16 Page - Freescale Semiconductor, Inc

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DSP56303 User’s Manual, Rev. 2
1-6
Freescale Semiconductor
DSP56303 Overview
1.6 DSP56300 Core Functional Blocks
The functional blocks of the DSP56300 core are:
„ Data arithmetic logic unit (ALU)
„ Address generation unit
„ Program control unit
„ PLL and clock oscillator
„ JTAG TAP and OnCE module
„ Memory
In addition, the DSP56303 provides a set of internal peripherals, discussed in
Section 1.9, Peripherals, on page 1-12.
1.6.1 Data ALU
The data ALU performs all the arithmetic and logical operations on data operands in the
DSP56300 core. These are the components of the data ALU:
„ Fully pipelined 24 × 24-bit parallel multiplier-accumulator
„ Bit field unit, comprising a 56-bit parallel barrel shifter (fast shift and normalization; bit
stream generation and parsing)
„ Conditional ALU instructions
„ Software-controllable 24-bit, 48-bit, or 56-bit arithmetic support
„ Four 24-bit or 48-bit input general-purpose registers: X1, X0, Y1, and Y0
„ Six data ALU registers (A2, A1, A0, B2, B1, and B0) that are concatenated into two
general-purpose, 56-bit accumulators, A and B, accumulator shifters
„ Two data bus shifter/limiter circuits
1.6.1.1 Data ALU Registers
The data ALU registers are read or written over the X data bus and the Y data bus as 16- or 32-bit
operands. The source operands for the data ALU can be 16, 32, or 40 bits and always originate
from data ALU registers. The results of all data ALU operations are stored in an accumulator.
Data ALU operations are performed in two clock cycles in a pipeline so that a new instruction
can be initiated in every clock cycle, yielding an effective execution rate of one instruction per
clock cycle. The destination of every arithmetic operation can be a source operand for the
immediately following operation without penalty.
1.6.1.2 Multiplier-Accumulator (MAC)
The MAC unit comprises the main arithmetic processing unit of the DSP56300 core and
performs all of the calculations on data operands. For arithmetic instructions, the unit accepts as



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