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Data Transfer Methods

DSP56303 User’s Manual, Rev. 2

Freescale Semiconductor

5-3

5.4.1 Polling

Polling is the easiest method for data transfers. When polling is chosen, the DSP56303 core

continuously checks a specified register flag waiting for an event to happen. One example would

be setting an overflow flag in one of the Timers. Once the event occurs, the DSP56303 is free to

continue with its next task. However, while it is waiting for the event to occur, the DSP56303

core is not executing any other code. Polling is the easiest transfer method since it does not

require register initialization, but it is also the least efficient use of the DSP core.

Each peripheral has its own set of flags which can be polled to determine when data is ready to be

transferred. For example, the ESSI control registers provide bits that tell the core when data is

ready to be transferred to or from the peripheral. The core polls these bits to determine when to

interact with the peripheral. Similar flags exist for each peripheral.

Example 5-1 shows software polling programmed in an application using the HI08.

Example 5-1. Software Polling

jclr#1,x:M_HSR,*

; loop if HSR[1]:HTDE=0

movey:(TBUFF_PTR)+,x1

; move data to x1

In this example, the core waits until the Host Status Register (HSR) Host Transmit Data Empty

(HTDE) flag is set. When the flag is set, the core moves data from Y memory to the X1 register.

5.4.2 Interrupts

Interrupts are more efficient than polling, but interrupts also require additional register

initialization. Polling requires the core to remain busy checking a flag in a specified control

interrupts, you can initialize the interrupt so it is triggered off one of the same flags that can also

be polled. Then the core does not have to continuously check a flag. Once the interrupt is

initialized and the flag is set, the core is notified to execute a data transfer. Until the flag is set, the

core can remain busy executing other sections of code.

When an interrupt occurs, the core execution flow jumps to the interrupt start address defined in

Table B-3 in Appendix B, Programming Reference. It executes code starting at the interrupt

address. If it is a short interrupt (that is, the service routine is two opcodes long), the code

automatically returns to the original program flow after executing two opcodes with no impact to

the pipeline. Otherwise, if a longer service routine is required the programmer can place a

jump-to-subroutine (JSR) instruction at the interrupt service address. In this case, the program

executes that service routine and continues until a return-from-interrupt (RTI) instruction

executes. The execution flow then resumes from the position the program counter was in before

the interrupt was triggered.

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