ADE9178 datasheet(42/122 Pages) AD

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Data Sheet

ADE9178

THEORY OF OPERATION

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Rev. A | 42 of 122

ALL CHANNEL MEASUREMENTS

This section explains the measurements that are done for all 12

channels.

Root Mean Square (RMS) Measurement

The ADE9178 supports three types of RMS measurements:

1. Filtered RMS

2. One-cycle RMS

3. Half-cycle RMS

Each type of RMS is calculated for all the input channels and

separate offset registers are provided for each of these for calibra-

tion purpose. Offsets for filtered RMS, RMS of one and half cycle

can be specified in xRMSOS, xRMSONEOS, and xRMSHALFOS

registers, respectively. Note that the offset is applied in the squared

domain as shown in Figure 58 and the following equation:

xRMS= xRMS02

+ 215×xRMSOS (30)

where, xRMS0 is the initial xRMS value before offset calibration.

Figure 58. Common RMS Datapath

The number of samples accumulated and averaged varies with the

RMS type and is explained in subsequent sections. There is no

gain registers separately for RMS calibrations and the application is

expected to use signal gain xxGAIN for gain adjustments.

RMS of One Cycle

This feature calculates RMS over every period of input signal.

One-cycle RMS measurements of all channels are done over the

same time interval and update at the same time as indicated by the

RMSONERDY bit in the STATUS0 register. The output is stored in

xRMSONE register and is updated every cycle. The LP_SEL bits

in the ZX_LP_SEL register select which voltage channel line period

value to be used in the one-cycle RMS measurement. Alternatively,

the user can set the number of samples used in the calculation by

setting the UPERIOD_SEL bit in CONFIG0, where the user-config-

ured USER_PERIOD register is used instead of the selected line

period value. USER_PERIOD is specified in Q16 fixed point format

as period in number of samples. Note that the USER_PERIOD is

not coerced to 50/60 Hz period (based on SELFREQ configuration)

if the given value is outside the recommended 40 Hz to 70 Hz

range.

For example, if the application wants USER_PERIOD to be 30

ms, USER_PERIOD configures as 0.030 × 4000 × 216 = 7864320

decimal = 0x780000. The RMSONE_SRC_SEL bit in CONFIG0

for one-cycle RMS measurement. If the bit is set to 1, it indicates

that the ADC samples before the HPF are to be used. If the bit

is set to 0, then samples obtained after the HPF are used for

calculation. For more details, see Figure 49. Since the HPF has

a significant settling time associated with it, it is recommended

to use the data from before the HPF for the fastest response

time (RMSONE_SRC_SEL = 0x1). It is recommended to configure

CONFIG0:PERIOD_AVG_CFG[4:3] to 0x2 to average the period

over 16 samples. This reduces the period jitter.

RMS of Half Cycle

This feature calculates RMS and updates xRMSHALF registers

over every half period of signal. Note that this behavior is dif-

ferent from the ADE9000, where RMS is calculated over one

cycle but updated every half cycle. xRMSHALF registers only

updates when zero crossings are present, therefore if zero cross-

ing disappear then the value in xRMSHALF register is at the

last known value. The RMSHALF_SRC_SEL bit in CONFIG0 (for

more details, see Figure 49) register decides which waveform

input samples used for half-cycle RMS measurement are to be

taken before or after the HPF filter ( for the fastest response time,

set RMSHALF_SRC_SEL = 0x1). It is recommended to configure

CONFIG0:PERIOD_AVG_CFG[4:3] to 0x2 to average the period

over 16 samples. This reduces the period jitter. There are two

modes of operation. Each channel has a separate configuration bit

in RMSHALF_CONFIG register to choose between the two modes.

If the bit is set to 0, then the RMS of half-cycle measurement is

synchronized to the zero crossing of corresponding channel. This

means that the ZX bit for a particular channel in STATUS0 gets set

after the xRMSHALF registers are updated.

If the bit is set to 1, then the user can specify half period in

USER_PERIOD_HALF register, which is used for measurement.

In this case, the output is not synchronized with zero crossings.

This mode can be used when measuring non periodic signals.

USER_PERIOD_HALF is specified in Q16 fixed point format as pe-

riod in number of samples same as USER_PERIOD for one-cycle

RMS. Note that the USER_PERIOD_HALF is not coerced to 50/60

Hz period (based on SELFREQ configuration) if the given value

is outside the recommended 40 Hz to 70 Hz range. For example,

if the application wants to set 30 ms, USER_PERIOD_HALF config-

ures as 0.030 × 4000 × 216 = 7864320 decimal = 0x780000.

Filtered RMS

The ADE9178 offers filter-based RMS updated every 1 kSPS. The

output of filtered RMS is available in xRMS registers. The settling

time for this RMS measurement is approximately 580 ms for both

50 Hz and 60 Hz input signals. Filtered RMS has a bandwidth of

1.61 kHz.

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