ADE9178 datasheet(86/122 Pages) AD

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Data Sheet

ADE9178

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Rev. A | 86 of 122

Table 34. ADE9178 Register Details (Continued)

Addr

Name

Bits

Bit Name

Settings

Description

Reset

Access

[24:20]

ADC CV Channel Data

Multiplexing. Selects slot to

connect CV channel input.

0x4

R/W

[19:15]

ADC BI Channel Data

Multiplexing. Selects slot to

connect BI channel input.

0x6

R/W

[14:10]

ADC BV Channel Data

Multiplexing. Selects slot to

connect BV channel input.

0x7

R/W

[9:5]

ADC AI Channel Data

Multiplexing. Selects slot to

connect AI channel input.

0x9

R/W

[4:0]

ADC AV Channel Data

Multiplexing. Selects slot to

connect AV channel input.

0xA

R/W

0x0DA

ADC_REDIRECT1

[31:30]

RESERVED

Reserved.

0x0

[29:25]

AUX5

ADC AUX5 Channel Data

Multiplexing. Selects slot to

connect AUX5 channel input.

0x2

R/W

[24:20]

AUX4

ADC AUX4 Channel Data

Multiplexing. Selects slot to

connect AUX4 channel input.

0x1

R/W

[19:15]

AUX3

ADC AUX3 Channel Data

Multiplexing. Selects slot to

connect AUX3 channel input.

0x0

R/W

[14:10]

AUX2

ADC AUX2 Channel Data

Multiplexing. Selects slot to

connect AUX2 channel input.

0x5

R/W

[9:5]

AUX1

ADC AUX1 Channel Data

Multiplexing. Selects slot to

connect AUX1 channel input.

0x8

R/W

[4:0]

AUX0

ADC AUX0 Channel Data

Multiplexing. Selects slot to

connect AUX0 channel input.

0xB

R/W

0x0DB

CRC_OPTEN

[31:16]

RESERVED

Reserved.

0x0

CRC_ZXLPSEL_EN

CRC ZXLPSEL Enable. Set

this bit to include the

ZX_LP_SEL register in the

configuration register CRC

calculation.

0x0

R/W

CRC_ZXTOUT_EN

CRC ZXTOUT_EN Enable. Set

this bit to include the ZXTOUT

0x0

R/W

CRC_APP_NL_LVL_EN

CRC APP_NL_LVL Enable.

Set this bit to include the

APP_NL_LVL register in the

configuration register CRC

calculation.

0x0

R/W

CRC_ACT_NL_LVL_EN

CRC ACT_NL_LVL Enable.

Set this bit to include the

ACT_NL_LVL register in the

configuration register CRC

calculation.

0x0

R/W

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