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ADE9178 数据表(PDF) 6 Page - Analog Devices |
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ADE9178 数据表(HTML) 6 Page - Analog Devices |
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6 / 122 page ![]() Data Sheet ADE9178 SPECIFICATIONS analog.com Rev. A | 6 of 122 Table 1. System Specifications (Continued) Parameter Min Typ Max Unit Test Conditions/Comments Period Measurement Error 5 mHz Line frequency = 45 Hz to 65 Hz, CONFIG0:PERIOD_AVG_CFG[4:3] = 0x0 (no period averaging) CF1, CF2 PULSE OUTPUTS Output Frequency 500 Hz CF saturates at 1 kHz but performance specification is up to 500 Hz Active-Low Pulse Width 0.2 ms CF1 Jitter 0.1 % Voltage = 50% of full scale, current over dynamic range of 2000 to 1, CF1_THR = d1341078 = 500 Hz at current full scale, CF2 disabled 0.1 % Voltage = 50% of full scale, current over dynamic range of 2000 to 1, CF1_THR = d22351312 = 30 Hz at current full scale, CF2 disabled CF2 Jitter 0.5 % Voltage = 50% of full scale, current over dynamic range of 2000 to 1, CF1_THR = d1341078 = 500 Hz at current full scale, CF1 enabled 0.1 % Voltage = 50% of full scale, current over dynamic range of 2000 to 1, CF1_THR = d22351312 = 30 Hz at current full scale, CF1 enabled BOOT TIME System-Level Boot Time 16 ms From RSTN pin toggle to RSTDONE flag being set, VDD ≥ 2.97 V ADE91xx CLOCK Input Clock Frequency 16.384 MHz Tolerance 1000 ppm |
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