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ADE9178 数据表(PDF) 66 Page - Analog Devices |
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ADE9178 数据表(HTML) 66 Page - Analog Devices |
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66 / 122 page  Data Sheet ADE9178 REGISTER SUMMARY: ADE9178 analog.com Rev. A | 66 of 122 Table 33. ADE9178 Register Summary (Continued) Address Name Description Reset Access 0x0B6 USER_PERIOD User-Configured Line Period Value. 0x00500000 R/W 0x0B7 RMSHALF_CONFIG RMSHALF Mode Selection Configuration. 0x00000000 R/W 0x0B8 USER_PERIOD_HALF User-Configured Half-Line Cycle Period Value. 0x00280000 R/W 0x0B9 CF1_THR Energy Threshold for CF1 Pulse Generation. 0x0000FFFF R/W 0x0BA CF2_THR Energy Threshold for CF2 Pulse Generation. 0x0000FFFF R/W 0x0BB ZXTOUT Zero-Crossing Timeout Configuration Register. 0x0000FFFF R/W 0x0BC ZXTHRSH Zero-Crossing Threshold Register. 0x000019EA R/W 0x0BD ZX_LP_SEL Zero-Crossing and Line Period Configuration. 0x0000000F R/W 0x0BE SEQ_CYC Line-Cycles for Phase-Sequence Error Detection. 0x00000001 R/W 0x0BF ACT_NL_LVL No Load Threshold in the Active Power Datapath. 0x0000FFFF R/W 0x0C0 APP_NL_LVL No Load Threshold in the Apparent Power Datapath. 0x0000FFFF R/W 0x0C1 EP_CFG Energy and Power Accumulation Configuration. 0x00000000 R/W 0x0C2 EGY_TIME Energy Accumulation Update Time Configuration. 0x000000FF R/W 0x0C3 VSUMRMSONEOS Offset Correction for VSUMRMS Calculation. 0x00000000 R/W 0x0C4 VSUMSWELLONE_LVL VSUM RMSONE Swell-Detection Threshold Level. 0xFFFFFFFF R/W 0x0C5 VSUMSWELLONE_CYC VSUM RMSONE Swell-Line Cycles Configuration. 0xFFFFFFFF R/W 0x0C6 VABRMSONEOS Offset Correction for VP2P (AV − BV) RMSONE Calculation. 0x00000000 R/W 0x0C7 VABDIPONE_LVL VP2P (AV − BV) RMSONE Dip-Detection Threshold Level. 0x00000000 R/W 0x0C8 VABDIPONE_CYC VP2P (AV − BV) RMSONE Dip-Line Cycles Configuration. 0xFFFFFFFF R/W 0x0C9 VABSWELLONE_LVL VP2P (AV − BV) RMSONE Swell-Detection Threshold Level. 0xFFFFFFFF R/W 0x0CA VABSWELLONE_CYC VP2P (AV − BV) RMSONE Swell-Line Cycles Configuration. 0xFFFFFFFF R/W 0x0CB VBCRMSONEOS Offset Correction for VP2P (BV − CV) RMSONE Calculation. 0x00000000 R/W 0x0CC VBCDIPONE_LVL VP2P (BV − CV) RMSONE Dip-Detection Threshold Level. 0x00000000 R/W 0x0CD VBCDIPONE_CYC VP2P (BV − CV) RMSONE Dip-Line Cycles Configuration. 0xFFFFFFFF R/W 0x0CE VBCSWELLONE_LVL VP2P (BV − CV) RMSONE Swell-Detection Threshold Level. 0xFFFFFFFF R/W 0x0CF VBCSWELLONE_CYC VP2P (BV − CV) RMSONE Swell-Line Cycles Configuration. 0xFFFFFFFF R/W 0x0D0 VACRMSONEOS Offset Correction for VP2P (AV − CV) RMSONE Calculation. 0x00000000 R/W 0x0D1 VACDIPONE_LVL VP2P (AV − CV) RMSONE Dip-Detection Threshold Level. 0x00000000 R/W 0x0D2 VACDIPONE_CYC VP2P (AV − CV) RMSONE Dip-Line Cycles Configuration. 0xFFFFFFFF R/W 0x0D3 VACSWELLONE_LVL VP2P (AV − CV) RMSONE Swell-Detection Threshold Level. 0xFFFFFFFF R/W 0x0D4 VACSWELLONE_CYC VP2P (AV − CV) RMSONE Swell-Line Cycles Configuration. 0xFFFFFFFF R/W 0x0D5 CF_LTMR CF Calibration Pulse-Width Configuration Register. 0x00000000 R/W 0x0D6 WFS_CONFIG Waveform Streaming Configuration Register. 0x0000000C R/W 0x0D7 ADC_CONTROL ADC Control Register. 0x00000000 R/W 0x0D8 ADC_CONFIG ADC Configuration Register. 0x00000004 R/W 0x0D9 ADC_REDIRECT0 ADC Datapath Redirection Register 0. 0x06431D2A R/W 0x0DA ADC_REDIRECT1 ADC Datapath Redirection Register 1. 0x0410150B R/W 0x0DB CRC_OPTEN Configuration Registers CRC Selection. 0x00000000 R/W 0x0DC CRC_FORCE Force Configuration Registers CRC Update. 0x00000000 R/W 0x0DD CONFIG_LOCK Configuration Lock Register. 0x00000000 R/W 0x200 AVRMS Phase A Filter Based Voltage RMS. 0x00000000 R 0x201 AVRMSHALF Phase A Voltage Channel Half-Cycle RMS. 0x00000000 R 0x202 AVRMSONE Phase A Voltage Channel One-Cycle RMS. 0x00000000 R 0x203 AVDIPHALF Phase A Voltage Minimum RMSHALF for Last Detected Dip. 0x007FFFFF R 0x204 AVDIPONE Phase A Voltage Minimum RMSONE for Last Detected Dip. 0x007FFFFF R 0x205 AVSWELLHALF Phase A Voltage Maximum RMSHALF for Last Detected Swell. 0x00000000 R 0x206 AVSWELLONE Phase A Voltage Maximum RMSONE for Last Detected Swell. 0x00000000 R |
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