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ADE9178 数据表(PDF) 83 Page - Analog Devices |
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ADE9178 数据表(HTML) 83 Page - Analog Devices |
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83 / 122 page  Data Sheet ADE9178 REGISTER DETAILS: ADE9178 analog.com Rev. A | 83 of 122 Table 34. ADE9178 Register Details (Continued) Addr Name Bits Bit Name Settings Description Reset Access 0 Synchronized with Zero Crossing. Synchronize RMSHALF calculation with zero crossings of the channel. 1 Synchronized with User- Defined Half Period Value. Synchronize RMSHALF calculation with user-defined half period value. 0x0BD ZX_LP_SEL [31:4] RESERVED Reserved. 0x0 R [3:2] LP_SEL Line Period Measurement Selection. Selects line period measurement used for xRMSONE measurement. 0x3 R/W 00 Phase A Voltage Channel Period. APERIOD, line period measurement from phase A voltage. 01 Phase B Voltage Channel Period. BPERIOD, line period measurement from phase B voltage. 10 Phase C Voltage Channel Period. CPERIOD, line period measurement from phase C voltage. 11 Combined Voltage Channel Period. COMB_PERIOD, line period measurement on combined voltage signal: (AV + BV − CV)/2. [1:0] ZX_SEL Zero-Crossing Signal Selection. Selects channel zero crossings used in line cycle energy accumulation mode. 0x3 R/W 00 Phase A Voltage Channel Zero Crossings. ZXAV, phase A voltage zero-crossing signal. 01 Phase B Voltage Channel Zero Crossings. ZXBV, phase B voltage zero-crossing signal. 10 Phase C Voltage Channel Zero Crossings. ZXAC, phase C voltage zero-crossing signal. 11 Combined Voltage Channel Zero Crossings. ZXCOMB, zero crossing on combined voltage signal: (AV + BV − CV)/2. 0x0C1 EP_CFG [31:7] RESERVED Reserved. 0x0 R [6:4] NOLOAD_TMR No Load Condition Evaluation Window. This register configures how many 4 ksps samples are used to evaluate the no load condition. 0x0 R/W |
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