ADE9178 datasheet(24/122 Pages) AD

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Data Sheet

ADE9178

THEORY OF OPERATION

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all calculations for all channels in that ADC. The ADE9178 also

raises an error interrupt (ERROR_STATUS:ADC_CRC_ERROR[6])

when this CRC error is detected. It is recommended to check ADC

SPI connections if this error persists or raised frequently during

development/design time of the application.

Host SPI

The SPI of the ADE9178 always acts as the subordinate and

consists of six pins. These pins are shown with prefix HOST in

Figure 33. Apart from standard SPI pins, HOST_RDY or

HOST_ERR signal is used to indicate response is ready or error

has occurred.

Data shifts into the device at the MOSI logic input on the falling

edge of SCLK, and the device samples the input data on the rising

edge of SCLK. Data shifts out of the ADE9178 at the MISO logic

output on the falling edge of SCLK and must be sampled by the

main device on the rising edge of SCLK. The least significant byte

of the word is shifted in and out first. The most significant bit of

each byte is sent first.

The ADE9178 is compatible with the following micro controller SPI

port clock polarity and phase settings:

CPOL = 1 and CPHA = 1 (typically Mode 3).

The minimum and maximum serial clock frequency supported is

500 kHz and 25 MHz, respectively.

The ADE9178 takes time to a process read or write command. The

ADE9178 raises HOST_RDY when the command is success-

ful. The host program must initiate the SPI read only after this

IRQ is raised.

Figure 33. ADE9178 to Host MCU SPI Connection

Table 9. HOST SPI Pin Description

Pins

Description

HOST_CS, HOST_SCLK, HOST_MOSI,

HOST_MISO

Standard 4-wire SPI pins.

HOST_ERR

Indicates last command has thrown

error.

HOST_RDY

Indicates response for last command

is ready.

The HOST_CS input must stay low for the whole SPI transaction.

Bringing HOST_CS high during a data transfer operation aborts the

transfer. A new transfer can be initiated by returning the HOST_CS

logic input low. Therefore, if the application does not need to read

back the register value (success case) or the status bits (error

case) after a write command the application MCU can toggle

HOST_CS to ignore the returned value.

It is not recommended to connect HOST_CS to ground because

the high-to-low transition on HOST_CS starts the ADE9178 SPI

transaction.

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