ADE9178 datasheet(90/122 Pages) AD

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Data Sheet

ADE9178

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Rev. A | 90 of 122

Table 34. ADE9178 Register Details (Continued)

Addr

Name

Bits

Bit Name

Settings

Description

Reset

Access

[26:24]

VPPHASE

Voltage Channel Peak

Phase. These bits indicate

which phase generated the

VPEAKVAL value. Among all

the monitored phases for peak

detection, phase A voltage had

the highest peak if bit 0 is

set, phase B voltage had the

highest peak if bit 1 is set,

and phase C voltage had the

highest peak if bit 2 is set.

0x0

[23:0]

VPEAKVAL

Absolute Value of the Peak

Voltage. Stores absolute value

of the peak for voltage

channels.

0x0

0x287

AUXPEAK

[31:30]

RESERVED

Reserved.

0x0

[29:24]

AUXPHASE

Auxiliary Channel Peak

Phase. These bits indicate

which phase generated the

AUXPEAKVAL value. Among

all the monitored phases for

peak detection, AUX0 had the

highest peak if bit 0 is set,

AUX1 had the highest peak

if bit 1 is set, AUX2 had the

highest peak if bit 2 is set, and

so on.

0x0

[23:0]

AUXPEAKVAL

Absolute Peak Value of the

Auxiliary Channels. Stores

absolute value of the peak for

auxiliary channels.

0x0

0x288

PHSIGN

[31:5]

RESERVED

Reserved.

0x0

SUM2SIGN

CF2 Last Sum Sign. Sign of

the sum of the powers included

in the CF2 datapath. The CF2

energy is positive if this bit is

clear and negative if this bit is

set.

0x0

SUM1SIGN

CF1 Last Sum Sign. Sign of

the sum of the powers included

in the CF1 datapath. The CF1

energy is positive if this bit is

clear and negative if this bit is

set.

0x0

CWSIGN

Phase C Active Power Sign

Bit. Sign of the active power

of phase C. The active energy

is positive if this bit is clear and

negative if this bit is set.

0x0

BWSIGN

Phase B Active Power Sign

Bit. Sign of the active power

of phase B. The active energy

is positive if this bit is clear and

negative if this bit is set.

0x0

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