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CY8CKIT-059 数据表(PDF) 98 Page - Infineon Technologies AG |
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CY8CKIT-059 数据表(HTML) 98 Page - Infineon Technologies AG |
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98 / 140 page ![]() Document Number: 001-84932 Rev. *N Page 97 of 139 PSoC® 5LP: CY8C58LP Family Datasheet 11.5.5 Analog Globals Table 11-30. Analog Globals DC Specifications Parameter Description Conditions Min Typ Max Units Rppag Resistance pin-to-pin through P2[4], AGL0, DSM INP, AGL1, P2[5][55, 57] VDDA = 3.0 V – 1500 2200 Ω VDDA = 1.71 V – 1200 1700 Ω Rppmuxbus Resistance pin-to-pin through P2[3], amuxbusL, P2[4][55, 57] VDDA = 3.0 V – 700 1100 Ω VDDA = 1.71 V – 600 900 Ω Table 11-31. Analog Globals AC Specifications Parameter Description Conditions Min Typ Max Units Inter-pair crosstalk for analog routes[56] 106 ––dB BWag Analog globals 3 db bandwidth[56] VDDA = 3.0 V, 25 °C – 26 – MHz Notes 55. Based on device characterization (Not production tested). 56. Pin P6[4] to del-sig ADC input; calculated, not measured. 57. The resistance of the analog global and analog mux bus is high if VDDA ≤ 2.7 V, and the chip is in either sleep or hibernate mode. Use of analog global and analog mux bus under these conditions is not recommended. |
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