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CY8CKIT-059 数据表(PDF) 107 Page - Infineon Technologies AG |
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CY8CKIT-059 数据表(HTML) 107 Page - Infineon Technologies AG |
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107 / 140 page  Document Number: 001-84932 Rev. *N Page 106 of 139 PSoC® 5LP: CY8C58LP Family Datasheet Figure 11-69. VDAC Step Response, Codes 0x40 - 0xC0, 1 V Mode, Fast Mode, Vdda = 5 V Figure 11-70. VDAC Glitch Response, Codes 0x7F - 0x80, 1 V Mode, Fast Mode, Vdda = 5 V Figure 11-71. VDAC PSRR vs Frequency Figure 11-72. VDAC Voltage Noise, 1 V Mode, Fast Mode, Vdda = 5 V Table 11-37. VDAC AC Specifications[64] Parameter Description Conditions Min Typ Max Units FDAC Update rate 1 V scale – – 1000 ksps 4 V scale – – 250 ksps TsettleP Settling time to 0.1%, step 25% to 75% 1 V scale, Cload = 15 pF – 0.45 1 µs 4 V scale, Cload = 15 pF – 0.8 3.2 µs TsettleN Settling time to 0.1%, step 75% to 25% 1 V scale, Cload = 15 pF – 0.45 1 µs 4 V scale, Cload = 15 pF – 0.7 3 µs Voltage noise Range = 1 V, fast mode, Vdda = 5V, 10kHz –750 – nV/sqrtHz 05 0.75 1 0 0.25 0.5 00.5 11.5 2 Time, μs 0.52 0.54 0.48 0.5 0 0.5 1 1.5 2 Time, μs 20 30 40 50 0 10 0.1 1 10 100 1000 Frequency, kHz 4 V, code 0x7F 4 V, code 0xFF 1000 10000 100000 10 100 1000 0.01 0.1 1 10 100 Frequency, kHz Note 64. Based on device characterization (Not production tested). |
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