TMS320F2811 datasheet(39/173 Pages) TI

39 / 173 page

Functional Overview

April 2001 − Revised July 2007

SPRS174O

3.2.16

Peripheral Clocking

The clocks to each individual peripheral can be enabled/disabled to reduce power consumption when a

peripheral is not in use. Additionally, the system clock to the serial ports (except eCAN) and the event

managers, CAP and QEP blocks can be scaled relative to the CPU clock. This enables the timing of

peripherals to be decoupled from increasing CPU clock speeds.

3.2.17

Low-Power Modes

The F281x and C281x devices are fully static CMOS devices. Three low-power modes are provided:

IDLE:

Place CPU in low-power mode. Peripheral clocks may be turned off selectively and only

those peripherals that must function during IDLE are left operating. An enabled interrupt

from an active peripheral will wake the processor from IDLE mode.

STANDBY:

Turns off clock to CPU and peripherals. This mode leaves the oscillator and PLL functional.

An external interrupt event will wake the processor and the peripherals. Execution begins

on the next valid cycle after detection of the interrupt event.

HALT:

Turns off the internal oscillator. This mode basically shuts down the device and places it in

the lowest possible power consumption mode. Only a reset or XNMI can wake the device

from this mode.

3.2.18

Peripheral Frames 0, 1, 2 (PFn)

The F281x and C281x segregate peripherals into three sections. The mapping of peripherals is as follows:

PF0:

XINTF:

External Interface Configuration Registers (2812 only)

PIE:

PIE Interrupt Enable and Control Registers Plus PIE Vector Table

Flash:

Flash Control, Programming, Erase, Verify Registers

Timers:

CPU-Timers 0, 1, 2 Registers

CSM:

Code Security Module KEY Registers

PF1:

eCAN:

eCAN Mailbox and Control Registers

PF2:

SYS:

System Control Registers

GPIO:

GPIO Mux Configuration and Control Registers

EV:

Event Manager (EVA/EVB) Control Registers

McBSP:

McBSP Control and TX/RX Registers

SCI:

Serial Communications Interface (SCI) Control and RX/TX Registers

SPI:

Serial Peripheral Interface (SPI) Control and RX/TX Registers

ADC:

12-Bit ADC Registers

3.2.19

General-Purpose Input/Output (GPIO) Multiplexer

Most of the peripheral signals are multiplexed with general-purpose I/O (GPIO) signals. This multiplexing

enables use of a pin as GPIO if the peripheral signal or function is not used. On reset, all GPIO pins are

configured as inputs. The user can then individually program each pin for GPIO mode or peripheral signal

mode. For specific inputs, the user can also select the number of input qualification cycles to filter unwanted

noise glitches.

TMS320F2811 数据表(PDF) 39 Page - Texas Instruments

TMS320F2811 数据表(HTML) 39 Page - Texas Instruments

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