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TMS320F2811 数据表(PDF) 100 Page - Texas Instruments |
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TMS320F2811 数据表(HTML) 100 Page - Texas Instruments |
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100 / 173 page ![]() Electrical Specifications 100 April 2001 − Revised July 2007 SPRS174O 6.10 Signal Transition Levels Note that some of the signals use different reference voltages, see the recommended operating conditions table. Output levels are driven to a minimum logic-high level of 2.4 V and to a maximum logic-low level of 0.4 V. Figure 6−7 shows output levels. 0.4 V (VOL) 2.4 V (VOH) Figure 6−7. Output Levels Output transition times are specified as follows: • For a high-to-low transition, the level at which the output is said to be no longer high is below VOH(MIN) and the level at which the output is said to be low is VOL(MAX) and lower. • For a low-to-high transition, the level at which the output is said to be no longer low is above VOL(MAX) and the level at which the output is said to be high is VOH(MIN) and higher. Figure 6−8 shows the input levels. 0.8 V (VIL) 2.0 V (VIH) Figure 6−8. Input Levels Input transition times are specified as follows: • For a high-to-low transition on an input signal, the level at which the input is said to be no longer high is below VIH(MIN) and the level at which the input is said to be low is VIL(MAX) and lower. • For a low-to-high transition on an input signal, the level at which the input is said to be no longer low is above VIL(MAX) and the level at which the input is said to be high is VIH(MIN) and higher. NOTE: See the individual timing diagrams for levels used for testing timing parameters. |
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