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TMS320F2811 数据表(PDF) 18 Page - Texas Instruments

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部件名 TMS320F2811
功能描述  Digital Signal Processors
PDF  173 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

TMS320F2811 数据表(HTML) 18 Page - Texas Instruments

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Introduction
18
April 2001 − Revised July 2007
SPRS174O
Table 2−2. Signal Descriptions† (Continued)
NAME
DESCRIPTION
PU/PD§
I/O/Z‡
PIN NO.
NAME
DESCRIPTION
PU/PD§
I/O/Z‡
128-PINP
BK
176-PINP
GF
179-PING
HH
XINTF SIGNALS (2812 ONLY) (CONTINUED)
XMP/MC
F1
17
−
I
PD
Microprocessor/Microcomputer
Mode
Select.
Switches
between
microprocessor
and
microcomputer mode. When high, Zone 7 is enabled
on the external interface. When low, Zone 7 is
disabled from the external interface, and on-chip
boot ROM may be accessed instead. This signal is
latched into the XINTCNF2 register on a reset and
the user can modify this bit in software. The state of
the XMP/MC pin is ignored after reset.
XHOLD
E7
159
−
I
PU
External Hold Request. XHOLD, when active (low),
requests the XINTF to release the external bus and
place all buses and strobes into a high-impedance
state. The XINTF will release the bus when any
current access is complete and there are no pending
accesses on the XINTF.
XHOLDA
K10
82
−
O/Z
−
External Hold Acknowledge. XHOLDA is driven
active (low) when the XINTF has granted a XHOLD
request. All XINTF buses and strobe signals will be
in a high-impedance state. XHOLDA is released
when the XHOLD signal is released. External
devices should only drive the external bus when
XHOLDA is active (low).
XZCS0AND1
P1
44
−
O/Z
−
XINTF Zone 0 and Zone 1 Chip Select. XZCS0AND1
is active (low) when an access to the XINTF Zone 0
or Zone 1 is performed.
XZCS2
P13
88
−
O/Z
−
XINTF Zone 2 Chip Select. XZCS2 is active (low)
when an access to the XINTF Zone 2 is performed.
XZCS6AND7
B13
133
−
O/Z
−
XINTF
Zone
6
and
Zone
7
Chip
Select.
XZCS6AND7 is active (low) when an access to the
XINTF Zone 6 or Zone 7 is performed.
XWE
N11
84
−
O/Z
−
Write Enable. Active-low write strobe. The write
strobe waveform is specified, per zone basis, by the
Lead, Active, and Trail periods in the XTIMINGx
registers.
XRD
M3
42
−
O/Z
−
Read Enable. Active-low read strobe. The read
strobe waveform is specified, per zone basis, by the
Lead, Active, and Trail periods in the XTIMINGx
registers. NOTE: The XRD and XWE signals are
mutually exclusive.
XR/W
N4
51
−
O/Z
−
Read Not Write Strobe. Normally held high. When
low, XR/W indicates write cycle is active; when high,
XR/W indicates read cycle is active.
† Typical drive strength of the output buffer for all pins is 4 mA except for TDO, XCLKOUT, XF, XINTF, EMU0, and EMU1 pins, which are 8 mA.
‡ I = Input, O = Output, Z = High impedance
§ PU = pin has internal pullup; PD = pin has internal pulldown. Pullup/pulldown strength is given in Section 6.3. The pullups/pulldowns are enabled
in boundary scan mode.



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