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TMS320F2811 数据表(PDF) 27 Page - Texas Instruments |
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TMS320F2811 数据表(HTML) 27 Page - Texas Instruments |
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27 / 173 page ![]() Introduction 27 April 2001 − Revised July 2007 SPRS174O Table 2−2. Signal Descriptions† (Continued) NAME DESCRIPTION PU/PD§ I/O/Z‡ PIN NO. NAME DESCRIPTION PU/PD§ I/O/Z‡ 128-PINP BK 176-PINP GF 179-PING HH GPIOF OR XF CPU OUTPUT SIGNAL GPIOF14 − XF_XPLLDIS (O) A11 140 101 I/O PU This pin has three functions: 1. XF − General-purpose output pin. 2. XPLLDIS − This pin is sampled during reset to check whether the PLL must be disabled. The PLL will be disabled if this pin is sensed low. HALT and STANDBY modes cannot be used when the PLL is disabled. 3. GPIO − GPIO function GPIOG OR SCI-B SIGNALS GPIOG4 − SCITXDB (O) P14 90 66 I/O/Z − GPIO or SCI asynchronous serial port transmit data GPIOG5 − SCIRXDB (I) M13 91 67 I/O/Z − GPIO or SCI asynchronous serial port receive data † Typical drive strength of the output buffer for all pins is 4 mA except for TDO, XCLKOUT, XF, XINTF, EMU0, and EMU1 pins, which are 8 mA. ‡ I = Input, O = Output, Z = High impedance § PU = pin has internal pullup; PD = pin has internal pulldown. Pullup/pulldown strength is given in Section 6.3. The pullups/pulldowns are enabled in boundary scan mode. NOTE: Other than the power supply pins, no pin should be driven before the 3.3-V rail has reached recommended operating conditions. However, it is acceptable for an I/O pin to ramp along with the 3.3-V supply. |
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