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TMS320F2811 数据表(PDF) 23 Page - Texas Instruments |
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TMS320F2811 数据表(HTML) 23 Page - Texas Instruments |
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23 / 173 page  Introduction 23 April 2001 − Revised July 2007 SPRS174O Table 2−2. Signal Descriptions† (Continued) NAME DESCRIPTION PU/PD§ I/O/Z‡ PIN NO. NAME DESCRIPTION PU/PD§ I/O/Z‡ 128-PINP BK 176-PINP GF 179-PING HH POWER SIGNALS VDD H1 23 20 VDD L1 37 29 VDD P5 56 42 VDD P9 75 56 1.8-V or 1.9-V Core Digital Power Pins. See VDD P12 − 63 1.8-V or 1.9-V Core Digital Power Pins. See Section 6.2, Recommended Operating Conditions, VDD K12 100 74 Section 6.2, Recommended Operating Conditions, for voltage requirements. VDD G12 112 82 for voltage requirements. VDD C14 128 94 VDD B10 143 102 VDD C8 154 110 VSS G4 19 17 VSS K1 32 26 VSS L2 38 30 VSS P4 52 39 VSS K6 58 − VSS P8 70 53 VSS M10 78 59 VSS L11 86 62 Core and Digital I/O Ground Pins VSS K13 99 73 Core and Digital I/O Ground Pins VSS J14 105 − VSS G13 113 − VSS E14 120 88 VSS B14 129 95 VSS D10 142 − VSS C10 − 103 VSS B8 153 109 VDDIO J4 31 25 VDDIO L7 64 49 VDDIO L10 81 − 3.3-V I/O Digital Power Pins VDDIO N14 − − 3.3-V I/O Digital Power Pins VDDIO G11 114 83 VDDIO E9 145 104 VDD3VFL N8 69 52 3.3-V Flash Core Power Pin. This pin should be connected to 3.3 V at all times after power-up sequence requirements have been met. This pin is used as VDDIO in ROM parts and must be connected to 3.3 V in ROM parts as well. † Typical drive strength of the output buffer for all pins is 4 mA except for TDO, XCLKOUT, XF, XINTF, EMU0, and EMU1 pins, which are 8 mA. ‡ I = Input, O = Output, Z = High impedance § PU = pin has internal pullup; PD = pin has internal pulldown. Pullup/pulldown strength is given in Section 6.3. The pullups/pulldowns are enabled in boundary scan mode. |
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