TMS320F2811 datasheet(20/173 Pages) TI

20 / 173 page

Introduction

April 2001 − Revised July 2007

SPRS174O

Table 2−2. Signal Descriptions† (Continued)

NAME

DESCRIPTION

PU/PD§

I/O/Z‡

PIN NO.

NAME

DESCRIPTION

PU/PD§

I/O/Z‡

128-PINP

176-PINP

179-PING

JTAG AND MISCELLANEOUS SIGNALS (CONTINUED)

TEST1

I/O

−

Test Pin. Reserved for TI. On F281x devices, TEST1

must be left unconnected. On C281x devices, this

pin is a “no connect (NC)”

(i.e., this pin is not

connected to any circuitry internal to the device).

TEST2

I/O

−

Test Pin. Reserved for TI. On F281x devices, TEST2

must be left unconnected. On C281x devices, this

pin is a “no connect (NC)”

(i.e., this pin is not

connected to any circuitry internal to the device).

JTAG

TRST

B12

135

JTAG test reset with internal pulldown. TRST, when

driven high, gives the scan system control of the

operations of the device. If this signal is not

connected or driven low, the device operates in its

functional mode, and the test reset signals are

ignored.

NOTE: Do not use pullup resistors on TRST; it has

an internal pulldown device. TRST is an active high

test pin and must be maintained low at all times

during normal device operation. In a low-noise

environment, TRST may be left floating. In other

instances, an external pulldown resistor is highly

recommended. The value of this resistor should be

based on drive strength of the debugger pods

applicable to the design. A 2.2-k

Ω resistor generally

offers

adequate

protection.

Since

this

application-specific, it is recommended that each

target board be validated for proper operation of the

debugger and the application.

TCK

A12

136

JTAG test clock with internal pullup

TMS

D13

126

JTAG test-mode select (TMS) with internal pullup.

This serial control input is clocked into the TAP

controller on the rising edge of TCK.

TDI

C13

131

JTAG test data input (TDI) with internal pullup. TDI

is clocked into the selected register (instruction or

data) on a rising edge of TCK.

TDO

D12

127

O/Z

−

JTAG scan out, test data output (TDO). The contents

of the selected register (instruction or data) is shifted

out of TDO on the falling edge of TCK.

† Typical drive strength of the output buffer for all pins is 4 mA except for TDO, XCLKOUT, XF, XINTF, EMU0, and EMU1 pins, which are 8 mA.

‡ I = Input, O = Output, Z = High impedance

§ PU = pin has internal pullup; PD = pin has internal pulldown. Pullup/pulldown strength is given in Section 6.3. The pullups/pulldowns are enabled

in boundary scan mode.

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