TMS320F2811 datasheet(67/173 Pages) TI

67 / 173 page

Peripherals

April 2001 − Revised July 2007

SPRS174O

Figure 4−5 shows the ADC pin-biasing for internal reference and Figure 4−6 shows the ADC pin-biasing for

external reference.

ADCINA[7:0]

ADCINB[7:0]

ADCLO

ADCBGREFIN(A)

ADC External Current Bias Resistor

ADCRESEXT

ADCREFP

VDDA1

VDDA2

VSSA1

VSSA2

AVDDREFBG

AVSSREFBG

VDDAIO

VSSAIO

VDD1

VSS1

Test Pin

ADC Reference Positive Output

ADCREFM

ADC Reference Medium Output

ADC Analog Power

ADC Reference Power

ADC Analog I/O Power

ADC Digital Power

Analog input 0−3 V with respect to ADCLO

Connect to Analog Ground

24.9 k

W/20 kW(B)

mF(C)

Analog 3.3 V

Analog Ground

1.8 V

ADCREFP and ADCREFM should not

be loaded by external circuitry

can use the same 1.8-V (or 1.9-V) supply as

the digital core but separate the two with a

ferrite bead or a filter

Digital Ground

ADC 16-Channel Analog Inputs

NOTES: A. Provide access to this pin in PCB layouts. Intended for test purposes only.

B. Use 24.9 k

Ω for ADC clock range 1 − 18.75 MHz; use 20 kΩ for ADC clock range 18.75 − 25 MHz.

C. TAIYO YUDEN EMK325F106ZH, EMK325BJ106MD, or equivalent ceramic capacitor

D. External decoupling capacitors are recommended on all power pins.

E. Analog inputs must be driven from an operational amplifier that does not degrade the ADC performance.

Figure 4−5. ADC Pin Connections With Internal Reference

NOTE:

The temperature rating of any recommended component must match the rating of the end

product.

TMS320F2811 数据表(PDF) 67 Page - Texas Instruments

TMS320F2811 数据表(HTML) 67 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载