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ST10F280 数据表(PDF) 109 Page - STMicroelectronics |
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ST10F280 数据表(HTML) 109 Page - STMicroelectronics |
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109 / 186 page ![]() ST10F280 109/186 13.3.2.2 - XTSVR :Timer Start Value Register XTSVR (C002h) Reset Value: 0000h 13.3.2.3 - XTEVR : Timer End Value Register XTEVR (C004h) Reset Value: 0000h 13.3.2.4 - XTCVR : Timer Current Value Register XTCVR (C006h) Reset Value: 0000h 13.3.2.5 - Registers Mapping 15 14 13 12 11 10 9876543210 TSVR RW Bit Function TSVR[15:0] Timer Start Value TSVR contains the data to be transferred to the TCVR ’Current Value’ register when : 1) - TEN = ’1’ (TIM enable), - TLE = ’1’ (TIM Load enable), - TCVR = TEVR (count period finished), - TCS = ’1’ (stop mode disabled). 2) - first counting clock rising edge after the timer start (the timer starts on TEN rising edge). 15 14 13 12 11 10 9876543210 TEVR RW Bit Function TEVR[15:0] Timer End Value TEVR contains the data to be compared to the TCVR ’Current Value’ register. 15 14 13 12 11 10 9876543210 TCVR R Bit Function TCVR[15:0] Timer Current Value TCVR contains the current counting value. When TCVR = TEVR, TCVR content is changed according to Table 22. The TCVR clock is derived from internal XCLK clock according to TFP bits when TCM = ’0’. Table 23 : Timer Registers Mapping Address (Hexa) Register Name Reset Value (Hexa) Access C000h XTCR : Control 0000h RW C002h XTSVR : Start Value 0000h RW C004h XTEVR : End Value 0000h RW C006h XTCVR : Current Value 0000h R |
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