ST10F280 datasheet(136/186 Pages) STMICROELECTRONICS

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ST10F280

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18.2.1 - Protected Power Down Mode

This mode is selected by clearing the bit PWD-

CFG in register SYSCON to ‘0’.

In this mode, the Power Down mode can only be

entered if the NMI (Non Maskable Interrupt) pin is

externally pulled low while the PWRDN instruction

is executed.

This feature can be used in conjunction with an

external power failure signal which pulls the NMI

pin low when a power failure is imminent. The

microcontroller will enter the NMI trap routine

which can save the internal state into RAM. After

the internal state has been saved, the trap routine

may set a flag or write a certain bit pattern into

specific RAM locations, and then execute the

PWRDN instruction. If the NMI pin is still low at

this time, Power Down mode will be entered, oth-

erwise

program execution

continues.

During

power down the voltage delivered by the on-chip

voltage regulator automatically lowers the internal

logic supply down to 2.5 V, saving the power while

the contents of the internal RAM and all registers

will still be preserved.

Exiting Power Down Mode

In this mode, the only way to exit Power Down

mode is with an external hardware reset.

The initialization routine (executed upon reset)

can check the identification flag or bit pattern

within RAM to determine whether the controller

was initially switched on, or whether it was prop-

erly restarted from Power Down mode.

18.2.2 - Interruptable Power Down Mode

This mode is selected by setting the bit bit PWD-

CFG in register SYSCON to ‘1’.

In this mode, the Power Down mode can be

entered if enabled Fast External Interrupt pins

(EXxIN pins, alternate functions of Port 2 pins,

with x = 7...0) are in their inactive level. This inac-

tive level is configured with the EXIxES bit field in

the EXICON register, as follow:

EXICON (F1C0h / E0h)

ESFR

Reset Value: 0000h

9876543210

EXI7ES

EXI6ES

EXI5ES

EXI4ES

EXI3ES

EXI2ES

EXI1ES

EXI0ES

Bit

Function

EXIxES

(x=7...0)

External Interrupt x Edge Selection Field (x=7...0)

Fast external interrupts disabled: standard mode

EXxIN pin not taken in account for entering/exiting Power Down mode.

Interrupt on positive edge (rising)

Enter Power Down mode if EXiIN = ‘0’, exit if EXxIN = ‘1’ (referred as ‘high’ active level)

Interrupt on negative edge (falling)

Enter Power Down mode if EXiIN = ‘1’, exit if EXxIN = ‘0’ (referred as ‘low’ active level)

Interrupt on any edge (rising or falling)

Always enter Power Down mode, exit if EXxIN level changed.

ST10F280 数据表(PDF) 136 Page - STMicroelectronics

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