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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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H8S/2214 数据表(PDF) 499 Page - Renesas Technology Corp |
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H8S/2214 数据表(HTML) 499 Page - Renesas Technology Corp |
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499 / 936 page  Section 11 Watchdog Timer (WDT) Rev.4.00 Sep. 18, 2008 Page 439 of 872 REJ09B0189-0400 11.1.3 Register Configuration The WDT has three registers, as summarized in table 11.1. These registers control clock selection, WDT mode switching, the reset signal, etc. Table 11.1 WDT Registers Address* 1 Name Abbreviation R/W Initial Value Write* 2 Read Timer control/status register TCSR0 R/(W)* 3 H'00 H'FF74 H'FF74 Timer counter TCNT0 R/W H'00 H'FF74 H'FF75 Reset control/status register RSTCSR0 R/(W)* 3 H'1F H'FF76 H'FF77 Notes: 1. Lower 16 bits of the address. 2. For details of write operations, see section 11.2.4, Notes on Register Access. 3. Only 0 can be written in bit 7, to clear the flag. |
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