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H8S/2214 数据表(PDF) 503 Page - Renesas Technology Corp

部件名 H8S/2214
功能描述  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  936 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8S/2214 数据表(HTML) 503 Page - Renesas Technology Corp

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Section 11 Watchdog Timer (WDT)
Rev.4.00 Sep. 18, 2008 Page 443 of 872
REJ09B0189-0400
Bit 7—Watchdog Overflow Flag (WOVF): Indicates that TCNT has overflowed (from H'FF to
H'00) during watchdog timer operation. This bit is not set in interval timer mode.
Bit 7
WOVF
Description
0
[Clearing condition]
(Initial value)
Cleared by reading RSTCSR when WOVF = 1, then writing 0 to WOVF
1
[Setting condition]
When TCNT overflows (from H'FF to H'00) in watchdog timer mode
Bit 6—Reset Enable (RSTE): Specifies whether or not an internal reset signal is generated if
TCNT overflows in watchdog timer mode.
Bit 6
RSTE
Description
0
No internal reset when TCNT overflows*
(Initial value)
1
Internal reset is generated when TCNT overflows
Note: * The chip is not reset internally, but TCNT and TCSR in WDT0 are reset.
Bit 5—Reset Select (RSTS): Selects the type of internal reset generated if TCNT overflows in
watchdog timer mode.
For details of the types of resets, see section 4, Exception Handling.
Bit 5
RSTS
Description
0
Power-on reset
(Initial value)
1
Manual reset
Bits 4 to 0—Reserved: These bits cannot be modified and are always read as 1.



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