H8SSLASH2214 datasheet(183/936 Pages) RENESAS

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Section 6 Bus Controller

Rev.4.00 Sep. 18, 2008 Page 123 of 872

REJ09B0189-0400

6.2

6.2.1

Bus Width Control Register (ABWCR)

ABW7

R/W

ABW6

R/W

ABW5

R/W

ABW4

R/W

ABW3

R/W

ABW0

R/W

ABW2

R/W

ABW1

R/W

Bit

Initial value :

Modes 5 to 7

Mode 4

Initial value :

ABWCR is an 8-bit readable/writable register that designates each area for either 8-bit access or

16-bit access.

ABWCR sets the data bus width for the external memory space. The bus width for on-chip

memory and internal I/O registers is fixed regardless of the settings in ABWCR.

After a power-on reset and in hardware standby mode, ABWCR is initialized to H'FF in modes 5,

6, and 7, and to H'00 in mode 4. It is not initialized by a manual reset or in software standby mode.

Bits 7 to 0—Area 7 to 0 Bus Width Control (ABW7 to ABW0): These bits select whether the

corresponding area is to be designated for 8-bit access or 16-bit access.

Bit n

ABWn

Description

Area n is designated for 16-bit access

Area n is designated for 8-bit access

(n = 7 to 0)

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