H8SSLASH2214 datasheet(185/936 Pages) RENESAS

185 / 936 page

Section 6 Bus Controller

Rev.4.00 Sep. 18, 2008 Page 125 of 872

REJ09B0189-0400

6.2.3

Wait Control Registers H and L (WCRH, WCRL)

WCRH and WCRL are 8-bit readable/writable registers that select the number of program wait

states for each area.

Program waits are not inserted in the case of on-chip memory or internal I/O registers.

WCRH and WCRL are initialized to H'FF by a power-on reset and in hardware standby mode.

They are not initialized by a manual reset or in software standby mode.

(1) WCRH

W71

R/W

W70

R/W

W61

R/W

W60

R/W

W51

R/W

W40

R/W

W50

R/W

W41

R/W

Bit

Initial value

R/W

Bits 7 and 6—Area 7 Wait Control 1 and 0 (W71, W70): These bits select the number of

program wait states when area 7 in external space is accessed while the AST7 bit in ASTCR is set

to 1.

Bit 7

Bit 6

W71

W70

Description

Program wait not inserted when external space area 7 is accessed

1 program wait state inserted when external space area 7 is accessed

2 program wait states inserted when external space area 7 is accessed

3 program wait states inserted when external space area 7 is accessed

(Initial value)

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