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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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H8S/2214 数据表(PDF) 252 Page - Renesas Technology Corp |
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H8S/2214 数据表(HTML) 252 Page - Renesas Technology Corp |
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252 / 936 page  Section 7 DMA Controller Rev.4.00 Sep. 18, 2008 Page 192 of 872 REJ09B0189-0400 7.3.3 Execute Transfer Count Register (ETCR) ETCR is a 16-bit readable/writable register that specifies the number of transfers. The function of this register is different in normal mode and in block transfer mode. ETCR is not initialized by a reset or in standby mode. (1) Normal Mode ETCRA Transfer Counter Bit : 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ETCR : Initial value : * * * * * * * * * * * * * * * * R/W : R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W *: Undefined In normal mode, ETCRA functions as a 16-bit transfer counter. ETCRA is decremented by 1 each time a transfer is performed, and transfer ends when the count reaches H'0000. ETCRB is not used at this time. ETCRB ETCRB is not used in normal mode. |
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